Searched refs:shared_dpll (Results 1 – 10 of 10) sorted by relevance
144 state->shared_dpll); in intel_atomic_get_shared_dpll_state()147 return state->shared_dpll; in intel_atomic_get_shared_dpll_state()492 new_crtc_state->shared_dpll = NULL; in intel_put_dpll()494 if (!old_crtc_state->shared_dpll) in intel_put_dpll()514 struct intel_shared_dpll_state *shared_dpll = state->shared_dpll; in intel_shared_dpll_swap_state() local641 crtc_state->shared_dpll = pll; in ibx_get_dpll()1239 crtc_state->shared_dpll = pll; in hsw_get_dpll()1960 crtc_state->shared_dpll = pll; in skl_get_dpll()2445 crtc_state->shared_dpll = pll; in bxt_get_dpll()4698 if (new_crtc_state->shared_dpll) in intel_shared_dpll_state_verify()[all …]
259 assert_shared_dpll_enabled(display, crtc_state->shared_dpll); in ilk_enable_pch_transcoder()391 if (crtc_state->shared_dpll == in ilk_pch_enable()535 crtc_state->shared_dpll = intel_get_shared_dpll_by_id(display, pll_id); in ilk_pch_get_config()536 pll = crtc_state->shared_dpll; in ilk_pch_get_config()
94 if (crtc_state->shared_dpll) in intel_crtc_disable_noatomic_begin()96 crtc_state->shared_dpll, in intel_crtc_disable_noatomic_begin()97 &crtc_state->shared_dpll->state); in intel_crtc_disable_noatomic_begin()571 crtc_state->shared_dpll && in has_bogus_dpll_config()
262 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in icl_pll_to_ddi_clk_sel()1589 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in adls_ddi_enable_clock()1633 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in rkl_ddi_enable_clock()1677 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in dg1_ddi_enable_clock()1743 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in icl_ddi_combo_enable_clock()1787 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in jsl_ddi_tc_enable_clock()1830 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in icl_ddi_tc_enable_clock()1938 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in skl_ddi_enable_clock()2006 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in hsw_ddi_enable_clock()4289 const struct intel_shared_dpll *pll = crtc_state->shared_dpll; in icl_ddi_tc_port_pll_type()[all …]
594 struct intel_shared_dpll_state shared_dpll[I915_NUM_PLLS]; member1079 struct intel_shared_dpll *shared_dpll; member
1326 new_crtc_state->shared_dpll = old_crtc_state->shared_dpll; in intel_encoders_update_prepare()1669 if (pipe_crtc_state->shared_dpll) in hsw_crtc_enable()1973 if (crtc_state->shared_dpll) in get_crtc_power_domains()4486 saved_state->shared_dpll = secondary_crtc_state->shared_dpll; in copy_joiner_crtc_state_modeset()4549 saved_state->shared_dpll = crtc_state->shared_dpll; in intel_crtc_prepare_cleared_state()5301 PIPE_CONF_CHECK_P(shared_dpll); in intel_pipe_config_compare()
254 assert_shared_dpll_disabled(display, crtc_state->shared_dpll); in intel_pre_enable_lvds()
914 drm_WARN_ON(display->drm, crtc_state->shared_dpll->info->id != DPLL_ID_SPLL); in hsw_fdi_link_train()
1786 drm_WARN_ON(&i915->drm, !crtc_state->hw.enable && crtc_state->shared_dpll); in intel_dpll_crtc_get_shared_dpll()1788 if (!crtc_state->hw.enable || crtc_state->shared_dpll) in intel_dpll_crtc_get_shared_dpll()
660 struct intel_shared_dpll *pll = crtc_state->shared_dpll; in gen11_dsi_map_pll()