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Searched refs:set_rate (Results 1 – 25 of 305) sorted by relevance

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/linux-6.15/arch/arm/mach-omap1/
H A Dclock_data.c113 .set_rate = &omap1_set_sossi_rate,
121 .set_rate = omap1_clk_set_rate_ckctl_arm,
135 .set_rate = omap1_clk_set_rate_ckctl_arm,
205 .set_rate = omap1_clk_set_rate_ckctl_arm,
213 .set_rate = omap1_clk_set_rate_ckctl_arm,
372 .set_rate = &omap1_set_uart_rate,
408 .set_rate = &omap1_set_uart_rate,
425 .set_rate = &omap1_set_uart_rate,
521 .set_rate = &omap1_set_ext_clk_rate,
538 .set_rate = &omap1_set_ext_clk_rate,
[all …]
/linux-6.15/drivers/clk/starfive/
H A Dclk-starfive-jh71x0.c236 .set_rate = jh71x0_clk_set_rate,
243 .set_rate = jh71x0_clk_frac_set_rate,
253 .set_rate = jh71x0_clk_set_rate,
279 .set_rate = jh71x0_clk_set_rate,
291 .set_rate = jh71x0_clk_set_rate,
/linux-6.15/drivers/clk/ti/
H A Ddpll.c29 .set_rate = &omap3_noncore_dpll_set_rate,
52 .set_rate = &omap3_noncore_dpll_set_rate,
65 .set_rate = &omap3_noncore_dpll_set_rate,
84 .set_rate = &omap2_reprogram_dpllcore,
102 .set_rate = &omap3_noncore_dpll_set_rate,
114 .set_rate = &omap3_dpll5_set_rate,
126 .set_rate = &omap3_dpll4_set_rate,
/linux-6.15/drivers/clk/actions/
H A Dowl-composite.c169 .set_rate = owl_comp_div_set_rate,
186 .set_rate = owl_comp_fact_set_rate,
198 .set_rate = owl_comp_fix_fact_set_rate,
/linux-6.15/drivers/sh/clk/
H A Dcpg.c185 .set_rate = sh_clk_div_set_rate,
191 .set_rate = sh_clk_div_set_rate,
318 .set_rate = sh_clk_div_set_rate,
370 .set_rate = sh_clk_div_set_rate,
450 .set_rate = fsidiv_set_rate,
H A Dcore.c490 if (likely(clk->ops && clk->ops->set_rate)) { in clk_set_rate()
491 ret = clk->ops->set_rate(clk, rate); in clk_set_rate()
583 if (likely(clkp->ops->set_rate)) in clks_core_resume()
584 clkp->ops->set_rate(clkp, rate); in clks_core_resume()
/linux-6.15/drivers/clk/mvebu/
H A Dclk-corediv.c203 .set_rate = clk_corediv_set_rate,
219 .set_rate = clk_corediv_set_rate,
232 .set_rate = clk_corediv_set_rate,
244 .set_rate = clk_corediv_set_rate,
/linux-6.15/drivers/clk/
H A Dclk-composite.c174 return rate_ops->set_rate(rate_hw, rate, parent_rate); in clk_composite_set_rate()
194 rate_ops->set_rate(rate_hw, rate, parent_rate); in clk_composite_set_rate_and_parent()
198 rate_ops->set_rate(rate_hw, rate, parent_rate); in clk_composite_set_rate_and_parent()
296 if (rate_ops->set_rate) { in __clk_hw_register_composite()
298 clk_composite_ops->set_rate = in __clk_hw_register_composite()
310 if (mux_ops->set_parent && rate_ops->set_rate) in __clk_hw_register_composite()
/linux-6.15/drivers/clk/mxs/
H A Dclk-div.c57 ret = div->ops->set_rate(&div->divider.hw, rate, parent_rate); in clk_div_set_rate()
67 .set_rate = clk_div_set_rate,
/linux-6.15/drivers/clk/tegra/
H A Dclk-periph.c75 return div_ops->set_rate(div_hw, rate, parent_rate); in clk_periph_set_rate()
140 .set_rate = clk_periph_set_rate,
164 .set_rate = clk_periph_set_rate,
H A Dclk-tegra-super-cclk.c46 return tegra_clk_super_ops.set_rate(hw, rate, parent_rate); in cclk_super_set_rate()
121 .set_rate = cclk_super_set_rate,
/linux-6.15/include/linux/phy/
H A Dphy-dp.h76 u8 set_rate : 1; member
/linux-6.15/drivers/clk/ux500/
H A Dclk-prcmu.c161 .set_rate = clk_prcmu_set_rate,
173 .set_rate = clk_prcmu_set_rate,
191 .set_rate = clk_prcmu_set_rate,
/linux-6.15/drivers/clk/imx/
H A Dclk-pllv3.c156 .set_rate = clk_pllv3_set_rate,
211 .set_rate = clk_pllv3_sys_set_rate,
300 .set_rate = clk_pllv3_av_set_rate,
393 .set_rate = clk_pllv3_vf610_set_rate,
H A Dclk-busy.c63 ret = busy->div_ops->set_rate(&busy->div.hw, rate, parent_rate); in clk_busy_divider_set_rate()
73 .set_rate = clk_busy_divider_set_rate,
/linux-6.15/drivers/clk/st/
H A Dclk-flexgen.c185 clk_divider_ops.set_rate(pdiv_hw, parent_rate, parent_rate); in flexgen_set_rate()
186 ret = clk_divider_ops.set_rate(fdiv_hw, rate, rate * div); in flexgen_set_rate()
188 clk_divider_ops.set_rate(fdiv_hw, parent_rate, parent_rate); in flexgen_set_rate()
189 ret = clk_divider_ops.set_rate(pdiv_hw, rate, rate * div); in flexgen_set_rate()
203 .set_rate = flexgen_set_rate,
/linux-6.15/drivers/clk/sophgo/
H A Dclk-cv18xx-ip.c67 .set_rate = gate_set_rate,
291 .set_rate = div_set_rate,
380 .set_rate = bypass_div_set_rate,
499 .set_rate = mux_set_rate,
591 .set_rate = bypass_mux_set_rate,
778 .set_rate = mmux_set_rate,
886 .set_rate = aclk_set_rate,
/linux-6.15/drivers/clk/qcom/
H A Dclk-rcg.c829 .set_rate = clk_rcg_set_rate,
840 .set_rate = clk_rcg_set_floor_rate,
851 .set_rate = clk_rcg_bypass_set_rate,
862 .set_rate = clk_rcg_bypass2_set_rate,
874 .set_rate = clk_rcg_pixel_set_rate,
886 .set_rate = clk_rcg_esc_set_rate,
898 .set_rate = clk_rcg_lcc_set_rate,
910 .set_rate = clk_dyn_rcg_set_rate,
H A Dclk-rcg2.c809 .set_rate = clk_rcg2_set_rate,
822 .set_rate = clk_rcg2_set_gp_rate,
834 .set_rate = clk_rcg2_set_floor_rate,
847 .set_rate = clk_rcg2_fm_set_rate,
982 .set_rate = clk_edp_pixel_set_rate,
1040 .set_rate = clk_byte_set_rate,
1110 .set_rate = clk_byte2_set_rate,
1201 .set_rate = clk_pixel_set_rate,
1315 .set_rate = clk_gfx3d_set_rate,
1552 .set_rate = clk_rcg2_shared_set_rate,
[all …]
H A Dclk-alpha-pll.c1171 .set_rate = clk_alpha_pll_set_rate,
1181 .set_rate = alpha_pll_huayra_set_rate,
1191 .set_rate = clk_alpha_pll_hwfsm_set_rate,
1535 .set_rate = alpha_pll_fabia_set_rate,
1829 .set_rate = alpha_pll_trion_set_rate,
1840 .set_rate = alpha_pll_trion_set_rate,
1899 .set_rate = clk_alpha_pll_agera_set_rate,
2115 .set_rate = alpha_pll_lucid_5lpe_set_rate,
2300 .set_rate = clk_zonda_pll_set_rate,
2542 .set_rate = alpha_pll_lucid_5lpe_set_rate,
[all …]
/linux-6.15/include/linux/qed/
H A Dqed_iov_if.h28 int (*set_rate) (struct qed_dev *cdev, int vfid, member
/linux-6.15/sound/usb/6fire/
H A Dcontrol.h31 int (*set_rate)(struct control_runtime *rt, int rate); member
/linux-6.15/drivers/clk/samsung/
H A Dclk-pll.c302 .set_rate = samsung_pll35xx_set_rate,
413 .set_rate = samsung_pll36xx_set_rate,
518 .set_rate = samsung_pll0822x_set_rate,
614 .set_rate = samsung_pll0831x_set_rate,
739 .set_rate = samsung_pll45xx_set_rate,
884 .set_rate = samsung_pll46xx_set_rate,
1097 .set_rate = samsung_pll2550xx_set_rate,
1189 .set_rate = samsung_pll2650x_set_rate,
1279 .set_rate = samsung_pll2650xx_set_rate,
/linux-6.15/drivers/clk/at91/
H A Dclk-usb.c181 .set_rate = at91sam9x5_clk_usb_set_rate,
219 .set_rate = at91sam9x5_clk_usb_set_rate,
388 .set_rate = at91rm9200_clk_usb_set_rate,
/linux-6.15/sound/soc/codecs/
H A Dtlv320aic32x4-clk.c271 .set_rate = clk_aic32x4_pll_set_rate,
365 .set_rate = clk_aic32x4_div_set_rate,
393 .set_rate = clk_aic32x4_div_set_rate,

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