Searched refs:sdma_v5_0_get_reg_offset (Results 1 – 1 of 1) sorted by relevance
| /linux-6.15/drivers/gpu/drm/amd/amdgpu/ |
| H A D | sdma_v5_0.c | 426 WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, in sdma_v5_0_ring_set_wptr()
429 WREG32_SOC15_IP(GC, sdma_v5_0_get_reg_offset(adev, in sdma_v5_0_ring_set_wptr()
790 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_GFX_RB_WPTR), in sdma_v5_0_gfx_resume_instance()
822 temp = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CNTL)); in sdma_v5_0_gfx_resume_instance()
827 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CNTL), temp); in sdma_v5_0_gfx_resume_instance()
1015 m->sdmax_rlcx_ib_cntl = RREG32(sdma_v5_0_get_reg_offset(adev, 0, in sdma_v5_0_mqd_init()
1628 cntl = RREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CNTL)); in sdma_v5_0_reset_queue()
1630 WREG32(sdma_v5_0_get_reg_offset(adev, i, mmSDMA0_CNTL), cntl); in sdma_v5_0_reset_queue()
1715 sdma_v5_0_get_reg_offset(adev, 0, mmSDMA0_CNTL) : in sdma_v5_0_set_trap_irq_state()
1716 sdma_v5_0_get_reg_offset(adev, 1, mmSDMA0_CNTL); in sdma_v5_0_set_trap_irq_state()
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