Searched refs:sc_prim_fifo_size_frontend (Results 1 – 13 of 13) sorted by relevance
1596 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v6_0_constants_init()1613 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v6_0_constants_init()1630 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v6_0_constants_init()1647 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v6_0_constants_init()1664 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v6_0_constants_init()1745 …WREG32(mmPA_SC_FIFO_SIZE, ((adev->gfx.config.sc_prim_fifo_size_frontend << PA_SC_FIFO_SIZE__SC_FRO… in gfx_v6_0_constants_init()
200 unsigned sc_prim_fifo_size_frontend; member
1685 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v8_0_gpu_early_init()1702 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v8_0_gpu_early_init()1717 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v8_0_gpu_early_init()1732 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v8_0_gpu_early_init()1749 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v8_0_gpu_early_init()1766 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v8_0_gpu_early_init()1783 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v8_0_gpu_early_init()1800 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v8_0_gpu_early_init()3807 (adev->gfx.config.sc_prim_fifo_size_frontend << in gfx_v8_0_constants_init()
1982 …((adev->gfx.config.sc_prim_fifo_size_frontend << PA_SC_FIFO_SIZE__SC_FRONTEND_PRIM_FIFO_SIZE__SHIF… in gfx_v7_0_constants_init()4195 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v7_0_gpu_early_init()4212 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v7_0_gpu_early_init()4229 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v7_0_gpu_early_init()4248 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v7_0_gpu_early_init()
2029 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v9_0_gpu_early_init()2037 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v9_0_gpu_early_init()2047 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v9_0_gpu_early_init()2062 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v9_0_gpu_early_init()2074 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v9_0_gpu_early_init()2084 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v9_0_gpu_early_init()2095 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v9_0_gpu_early_init()
904 config[no_regs++] = adev->gfx.config.sc_prim_fifo_size_frontend; in amdgpu_debugfs_gca_config_read()
1091 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v11_0_gpu_early_init()1099 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v11_0_gpu_early_init()1111 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v11_0_gpu_early_init()
4587 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v10_0_gpu_early_init()4602 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v10_0_gpu_early_init()4613 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v10_0_gpu_early_init()
921 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v9_4_3_gpu_early_init()
901 adev->gfx.config.sc_prim_fifo_size_frontend = 0x20; in gfx_v12_0_gpu_early_init()
3090 rdev->config.si.sc_prim_fifo_size_frontend = 0x20; in si_gpu_init()3107 rdev->config.si.sc_prim_fifo_size_frontend = 0x20; in si_gpu_init()3125 rdev->config.si.sc_prim_fifo_size_frontend = 0x20; in si_gpu_init()3142 rdev->config.si.sc_prim_fifo_size_frontend = 0x20; in si_gpu_init()3159 rdev->config.si.sc_prim_fifo_size_frontend = 0x20; in si_gpu_init()3294 WREG32(PA_SC_FIFO_SIZE, (SC_FRONTEND_PRIM_FIFO_SIZE(rdev->config.si.sc_prim_fifo_size_frontend) | in si_gpu_init()
2132 unsigned sc_prim_fifo_size_frontend; member2163 unsigned sc_prim_fifo_size_frontend; member
3188 rdev->config.cik.sc_prim_fifo_size_frontend = 0x20; in cik_gpu_init()3205 rdev->config.cik.sc_prim_fifo_size_frontend = 0x20; in cik_gpu_init()3222 rdev->config.cik.sc_prim_fifo_size_frontend = 0x20; in cik_gpu_init()3241 rdev->config.cik.sc_prim_fifo_size_frontend = 0x20; in cik_gpu_init()3376 WREG32(PA_SC_FIFO_SIZE, (SC_FRONTEND_PRIM_FIFO_SIZE(rdev->config.cik.sc_prim_fifo_size_frontend) | in cik_gpu_init()