Searched refs:rv770 (Results 1 – 11 of 11) sorted by relevance
1194 rdev->config.rv770.max_pipes = 4; in rv770_gpu_init()1196 rdev->config.rv770.max_simds = 10; in rv770_gpu_init()1198 rdev->config.rv770.max_gprs = 256; in rv770_gpu_init()1214 rdev->config.rv770.max_pipes = 2; in rv770_gpu_init()1216 rdev->config.rv770.max_simds = 8; in rv770_gpu_init()1238 rdev->config.rv770.max_pipes = 2; in rv770_gpu_init()1240 rdev->config.rv770.max_simds = 2; in rv770_gpu_init()1258 rdev->config.rv770.max_pipes = 4; in rv770_gpu_init()1260 rdev->config.rv770.max_simds = 8; in rv770_gpu_init()1336 rdev->config.rv770.tiling_npipes = rdev->config.rv770.max_tile_pipes; in rv770_gpu_init()[all …]
195 u32 dll_cntl = pi->clk_regs.rv770.dll_cntl; in rv740_populate_mclk_value()196 u32 mpll_ss1 = pi->clk_regs.rv770.mpll_ss1; in rv740_populate_mclk_value()197 u32 mpll_ss2 = pi->clk_regs.rv770.mpll_ss2; in rv740_populate_mclk_value()291 pi->clk_regs.rv770.cg_spll_func_cntl = in rv740_read_clock_registers()293 pi->clk_regs.rv770.cg_spll_func_cntl_2 = in rv740_read_clock_registers()295 pi->clk_regs.rv770.cg_spll_func_cntl_3 = in rv740_read_clock_registers()302 pi->clk_regs.rv770.mpll_ad_func_cntl = in rv740_read_clock_registers()304 pi->clk_regs.rv770.mpll_ad_func_cntl_2 = in rv740_read_clock_registers()306 pi->clk_regs.rv770.mpll_dq_func_cntl = in rv740_read_clock_registers()308 pi->clk_regs.rv770.mpll_dq_func_cntl_2 = in rv740_read_clock_registers()[all …]
394 pi->clk_regs.rv770.mpll_ad_func_cntl; in rv770_populate_mclk_value()396 pi->clk_regs.rv770.mpll_ad_func_cntl_2; in rv770_populate_mclk_value()398 pi->clk_regs.rv770.mpll_dq_func_cntl; in rv770_populate_mclk_value()400 pi->clk_regs.rv770.mpll_dq_func_cntl_2; in rv770_populate_mclk_value()402 pi->clk_regs.rv770.mclk_pwrmgt_cntl; in rv770_populate_mclk_value()492 pi->clk_regs.rv770.cg_spll_func_cntl; in rv770_populate_sclk_value()922 pi->clk_regs.rv770.mpll_ad_func_cntl; in rv770_populate_smc_acpi_state()926 pi->clk_regs.rv770.mpll_dq_func_cntl; in rv770_populate_smc_acpi_state()930 pi->clk_regs.rv770.cg_spll_func_cntl; in rv770_populate_smc_acpi_state()1522 pi->clk_regs.rv770.cg_spll_func_cntl = in rv770_read_clock_registers()[all …]
480 pi->clk_regs.rv770.mpll_ad_func_cntl; in cypress_populate_mclk_value()482 pi->clk_regs.rv770.mpll_ad_func_cntl_2; in cypress_populate_mclk_value()484 pi->clk_regs.rv770.mpll_dq_func_cntl; in cypress_populate_mclk_value()486 pi->clk_regs.rv770.mpll_dq_func_cntl_2; in cypress_populate_mclk_value()488 pi->clk_regs.rv770.mclk_pwrmgt_cntl; in cypress_populate_mclk_value()490 pi->clk_regs.rv770.dll_cntl; in cypress_populate_mclk_value()1339 pi->clk_regs.rv770.mpll_ad_func_cntl; in cypress_populate_smc_acpi_state()1343 pi->clk_regs.rv770.mpll_dq_func_cntl; in cypress_populate_smc_acpi_state()1347 pi->clk_regs.rv770.cg_spll_func_cntl; in cypress_populate_smc_acpi_state()1353 pi->clk_regs.rv770.mclk_pwrmgt_cntl; in cypress_populate_smc_acpi_state()[all …]
306 *value = rdev->config.rv770.tile_config; in radeon_info_ioctl()363 *value = rdev->config.rv770.max_backends; in radeon_info_ioctl()380 *value = rdev->config.rv770.max_tile_pipes; in radeon_info_ioctl()400 *value = rdev->config.rv770.backend_map; in radeon_info_ioctl()429 *value = rdev->config.rv770.max_pipes; in radeon_info_ioctl()566 *value = rdev->config.rv770.active_simds; in radeon_info_ioctl()
41 rs400.o rs600.o rs690.o rv515.o r520.o r600.o rv770.o radeon_test.o \
61 struct rv770_clock_registers rv770; member
2285 track->npipes = p->rdev->config.rv770.tiling_npipes; in r600_cs_parse()2286 track->nbanks = p->rdev->config.rv770.tiling_nbanks; in r600_cs_parse()2287 track->group_size = p->rdev->config.rv770.tiling_group_size; in r600_cs_parse()
2189 struct rv770_asic rv770; member
2701 radeon_ring_write(ring, rdev->config.rv770.max_hw_contexts - 1); in r600_cp_start()
527 struct rv770_clock_registers rv770; member