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Searched refs:rtw_write32_mask (Results 1 – 20 of 20) sorted by relevance

/linux-6.15/drivers/net/wireless/realtek/rtw88/
H A Drtw8822c.c1271 rtw_write32_mask(rtwdev, REG_3WIRE2, in rtw8822c_txgapk_bb_dpk()
1378 rtw_write32_mask(rtwdev, REG_3WIRE2, in rtw8822c_txgapk_bb_dpk_restore()
1559 rtw_write32_mask(rtwdev, in rtw8822c_txgapk_calculate_offset()
1581 rtw_write32_mask(rtwdev, in rtw8822c_txgapk_calculate_offset()
1602 rtw_write32_mask(rtwdev, in rtw8822c_txgapk_calculate_offset()
1605 rtw_write32_mask(rtwdev, in rtw8822c_txgapk_calculate_offset()
1608 rtw_write32_mask(rtwdev, in rtw8822c_txgapk_calculate_offset()
1750 rtw_write32_mask(rtwdev, in rtw8822c_txgapk_save_all_tx_gain_table()
1775 rtw_write32_mask(rtwdev, in rtw8822c_txgapk_save_all_tx_gain_table()
4379 rtw_write32_mask(rtwdev, in rtw8822c_phy_cck_pd_set_reg()
[all …]
H A Drtw8812a.c125 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x0); in rtw8812a_iqk_backup_rf()
182 rtw_write32_mask(rtwdev, REG_BPBDB, BIT(18), 1); in rtw8812a_iqk_restore_afe()
183 rtw_write32_mask(rtwdev, REG_BPBDB, BIT(29), 1); in rtw8812a_iqk_restore_afe()
196 rtw_write32_mask(rtwdev, REG_RX_IQC_AB_A, in rtw8812a_iqk_rx_fill()
198 rtw_write32_mask(rtwdev, REG_RX_IQC_AB_A, in rtw8812a_iqk_rx_fill()
201 rtw_write32_mask(rtwdev, REG_RX_IQC_AB_A, in rtw8812a_iqk_rx_fill()
203 rtw_write32_mask(rtwdev, REG_RX_IQC_AB_A, in rtw8812a_iqk_rx_fill()
217 rtw_write32_mask(rtwdev, REG_RX_IQC_AB_B, in rtw8812a_iqk_rx_fill()
219 rtw_write32_mask(rtwdev, REG_RX_IQC_AB_B, in rtw8812a_iqk_rx_fill()
222 rtw_write32_mask(rtwdev, REG_RX_IQC_AB_B, in rtw8812a_iqk_rx_fill()
[all …]
H A Drtw88xxa.c549 rtw_write32_mask(rtwdev, REG_DWBCN0_CTRL, 0xf0, in rtw88xxau_tx_aggregation()
613 rtw_write32_mask(rtwdev, REG_RXPSEL, 0xff, 0x11); in rtw8812a_config_1t()
770 rtw_write32_mask(rtwdev, REG_RFE_INV_A, 0xf, 7); in rtw8821a_set_ext_band_switch()
771 rtw_write32_mask(rtwdev, REG_RFE_INV_A, 0xf0, 7); in rtw8821a_set_ext_band_switch()
957 rtw_write32_mask(rtwdev, REG_CCASEL, 0x3, 0); in rtw88xxa_switch_band()
962 rtw_write32_mask(rtwdev, REG_TXPSEL, 0xf0, 0x1); in rtw88xxa_switch_band()
990 rtw_write32_mask(rtwdev, REG_CCASEL, 0x3, 1); in rtw88xxa_switch_band()
995 rtw_write32_mask(rtwdev, REG_TXPSEL, 0xf0, 0); in rtw88xxa_switch_band()
1102 rtw_write32_mask(rtwdev, REG_CR, 0x30000, 0x2); in rtw88xxa_power_on()
1767 rtw_write32_mask(rtwdev, REG_BCN_CTRL, in rtw88xxa_iqk_configure_mac()
[all …]
H A Drtw8822b.c91 rtw_write32_mask(rtwdev, 0x40, BIT(2), 0x1); in rtw8822b_phy_rfe_init()
94 rtw_write32_mask(rtwdev, 0x1990, 0x3f, 0x30); in rtw8822b_phy_rfe_init()
98 rtw_write32_mask(rtwdev, 0x974, 0x3f, 0x3f); in rtw8822b_phy_rfe_init()
172 rtw_write32_mask(rtwdev, 0x28, 0x7e, crystal_cap); in rtw8822b_phy_set_param()
487 rtw_write32_mask(rtwdev, REG_CCA2ND, 0xf0, 0x4); in rtw8822b_set_channel_cca()
582 rtw_write32_mask(rtwdev, REG_RXIGI_A, 0x7f, igi); in rtw8822b_toggle_igi()
584 rtw_write32_mask(rtwdev, REG_RXIGI_B, 0x7f, igi); in rtw8822b_toggle_igi()
587 rtw_write32_mask(rtwdev, REG_RXPSEL, MASKBYTE0, in rtw8822b_toggle_igi()
657 rtw_write32_mask(rtwdev, 0xcbc, 0x300, 0x1); in rtw8822b_set_channel_bb()
804 rtw_write32_mask(rtwdev, REG_MRC, BIT(23), 0x0); in rtw8822b_config_trx_mode()
[all …]
H A Drtw8814a.c187 rtw_write32_mask(rtwdev, 0x1994, 0xf, 0xf); in rtw8814a_init_rfe_reg()
190 rtw_write32_mask(rtwdev, 0x1994, 0xf, 0xf); in rtw8814a_init_rfe_reg()
471 rtw_write32_mask(rtwdev, REG_RFE_INVSEL_D, in rtw8814a_set_rfe_reg_24g()
481 rtw_write32_mask(rtwdev, REG_RFE_INVSEL_D, in rtw8814a_set_rfe_reg_24g()
492 rtw_write32_mask(rtwdev, REG_RFE_INVSEL_D, in rtw8814a_set_rfe_reg_24g()
508 rtw_write32_mask(rtwdev, REG_RFE_INVSEL_D, in rtw8814a_set_rfe_reg_5g()
518 rtw_write32_mask(rtwdev, REG_RFE_INVSEL_D, in rtw8814a_set_rfe_reg_5g()
1726 rtw_write32_mask(rtwdev, REG_TXAGCIDX, in rtw8814a_iqk()
1728 rtw_write32_mask(rtwdev, REG_TX_AGC_B, in rtw8814a_iqk()
1730 rtw_write32_mask(rtwdev, REG_TX_AGC_C, in rtw8814a_iqk()
[all …]
H A Drtw8821a.c63 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x0); in rtw8821a_iqk_backup_rf()
78 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x0); in rtw8821a_iqk_restore_rf()
91 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x0); in rtw8821a_iqk_restore_afe()
98 rtw_write32_mask(rtwdev, REG_CCASEL, BIT(31), 0x1); in rtw8821a_iqk_restore_afe()
117 rtw_write32_mask(rtwdev, REG_RX_IQC_AB_A, in rtw8821a_iqk_rx_fill()
119 rtw_write32_mask(rtwdev, REG_RX_IQC_AB_A, in rtw8821a_iqk_rx_fill()
158 rtw_write32_mask(rtwdev, REG_OFDM0_A_TX_AFE, in rtw8821a_iqk_tx_vdf_true()
245 rtw_write32_mask(rtwdev, REG_IQC_Y, in rtw8821a_iqk_tx_vdf_true()
247 rtw_write32_mask(rtwdev, REG_IQC_X, in rtw8821a_iqk_tx_vdf_true()
377 rtw_write32_mask(rtwdev, REG_RX_IQC_AB_A, in rtw8821a_iqk_rx()
[all …]
H A Drtw8821c.c368 rtw_write32_mask(rtwdev, REG_CHFIR, BIT(31), 0x0); in rtw8821c_set_channel_rxdfir()
374 rtw_write32_mask(rtwdev, REG_CHFIR, BIT(31), 0x1); in rtw8821c_set_channel_rxdfir()
380 rtw_write32_mask(rtwdev, REG_CHFIR, BIT(31), 0x0); in rtw8821c_set_channel_rxdfir()
423 rtw_write32_mask(rtwdev, REG_TXSF2, MASKDWORD, in rtw8821c_cck_tx_filter_srrc()
425 rtw_write32_mask(rtwdev, REG_TXSF6, MASKLWORD, in rtw8821c_cck_tx_filter_srrc()
427 rtw_write32_mask(rtwdev, REG_TXFILTER, MASKDWORD, in rtw8821c_cck_tx_filter_srrc()
469 rtw_write32_mask(rtwdev, REG_TXSF2, MASKDWORD, in rtw8821c_set_channel_bb()
471 rtw_write32_mask(rtwdev, REG_TXSF6, MASKLWORD, in rtw8821c_set_channel_bb()
473 rtw_write32_mask(rtwdev, REG_TXFILTER, MASKDWORD, in rtw8821c_set_channel_bb()
540 rtw_write32_mask(rtwdev, REG_ADC40, BIT(31), 0x1); in rtw8821c_set_channel_bb()
[all …]
H A Drtw8723d.c105 rtw_write32_mask(rtwdev, REG_AFE_CTRL3, BIT_MASK_XTAL, in rtw8723d_phy_set_param()
150 rtw_write32_mask(rtwdev, REG_OFDM0_XAAGC1, MASKBYTE0, 0x50); in rtw8723d_phy_set_param()
151 rtw_write32_mask(rtwdev, REG_OFDM0_XAAGC1, MASKBYTE0, 0x20); in rtw8723d_phy_set_param()
374 rtw_write32_mask(rtwdev, REG_CCK0_SYS, BIT_CCK_SIDE_BAND, in rtw8723d_set_channel_bb()
721 rtw_write32_mask(rtwdev, REG_OFDM_0_XA_TX_IQ_IMBALANCE, in rtw8723d_iqk_fill_s1_matrix()
723 rtw_write32_mask(rtwdev, REG_OFDM_0_ECCA_THRESHOLD, in rtw8723d_iqk_fill_s1_matrix()
730 rtw_write32_mask(rtwdev, REG_OFDM_0_XA_TX_IQ_IMBALANCE, in rtw8723d_iqk_fill_s1_matrix()
732 rtw_write32_mask(rtwdev, REG_OFDM_0_ECCA_THRESHOLD, in rtw8723d_iqk_fill_s1_matrix()
744 rtw_write32_mask(rtwdev, REG_A_RXIQI, BIT_MASK_RXIQ_S1_X, in rtw8723d_iqk_fill_s1_matrix()
1043 rtw_write32_mask(rtwdev, REG_PWRTH2, 0x1f0000, in rtw8723d_phy_cck_pd_set()
[all …]
H A Drtw8703b.c661 rtw_write32_mask(rtwdev, REG_AFE_CTRL3, BIT_MASK_XTAL, in rtw8703b_phy_set_param()
721 rtw_write32_mask(rtwdev, REG_OFDM0_XAAGC1, MASKBYTE0, 0x50); in rtw8703b_phy_set_param()
722 rtw_write32_mask(rtwdev, REG_OFDM0_XAAGC1, MASKBYTE0, 0x20); in rtw8703b_phy_set_param()
750 rtw_write32_mask(rtwdev, REG_OFDM0_RXDSP, BIT_EN_RXDSP, 0x0); in rtw8703b_cfg_notch()
905 rtw_write32_mask(rtwdev, REG_OFDM0_TX_PSD_NOISE, in rtw8703b_set_channel_bb()
915 rtw_write32_mask(rtwdev, REG_CCK0_SYS, BIT_CCK_SIDE_BAND, in rtw8703b_set_channel_bb()
917 rtw_write32_mask(rtwdev, REG_OFDM_FA_RSTD_11N, 0xC00, in rtw8703b_set_channel_bb()
1351 rtw_write32_mask(rtwdev, REG_OFDM_0_XA_TX_IQ_IMBALANCE, in rtw8703b_iqk_fill_a_matrix()
1353 rtw_write32_mask(rtwdev, REG_OFDM_0_ECCA_THRESHOLD, in rtw8703b_iqk_fill_a_matrix()
1360 rtw_write32_mask(rtwdev, REG_OFDM_0_XA_TX_IQ_IMBALANCE, in rtw8703b_iqk_fill_a_matrix()
[all …]
H A Drtw8723x.c350 rtw_write32_mask(rtwdev, txagc->addr, txagc->mask, pwr_index); in rtw8723x_set_tx_power_index_by_rate()
389 rtw_write32_mask(rtwdev, REG_CCK_FA_RST_11N, BIT_MASK_CCK_FA_KEEP, 1); in __rtw8723x_false_alarm_statistics()
435 rtw_write32_mask(rtwdev, REG_CCK_FA_RST_11N, BIT_MASK_CCK_FA_KPEN, 0); in __rtw8723x_false_alarm_statistics()
436 rtw_write32_mask(rtwdev, REG_CCK_FA_RST_11N, BIT_MASK_CCK_FA_KPEN, 2); in __rtw8723x_false_alarm_statistics()
437 rtw_write32_mask(rtwdev, REG_PAGE_F_RST_11N, BIT_MASK_F_RST_ALL, 1); in __rtw8723x_false_alarm_statistics()
438 rtw_write32_mask(rtwdev, REG_PAGE_F_RST_11N, BIT_MASK_F_RST_ALL, 0); in __rtw8723x_false_alarm_statistics()
491 rtw_write32_mask(rtwdev, REG_OFDM0_XAAGC1, MASKBYTE0, 0x50); in __rtw8723x_iqk_restore_regs()
492 rtw_write32_mask(rtwdev, REG_OFDM0_XAAGC1, MASKBYTE0, backup->igia); in __rtw8723x_iqk_restore_regs()
494 rtw_write32_mask(rtwdev, REG_OFDM0_XBAGC1, MASKBYTE0, 0x50); in __rtw8723x_iqk_restore_regs()
495 rtw_write32_mask(rtwdev, REG_OFDM0_XBAGC1, MASKBYTE0, backup->igib); in __rtw8723x_iqk_restore_regs()
[all …]
H A Defuse.c16 rtw_write32_mask(rtwdev, REG_LDO_EFUSE_CTRL, BIT_MASK_EFUSE_BANK_SEL, in switch_efuse_bank()
130 rtw_write32_mask(rtwdev, REG_EFUSE_CTRL, 0x3ff00, addr); in rtw_read8_physical_efuse()
H A Drtw8822b.h113 rtw_write32_mask(rtwdev, addr, mask, data); in _rtw_write32s_mask()
114 rtw_write32_mask(rtwdev, addr + 0x200, mask, data); in _rtw_write32s_mask()
H A Drtw8821c.h111 rtw_write32_mask(rtwdev, addr, mask, data); in _rtw_write32s_mask()
112 rtw_write32_mask(rtwdev, addr + 0x200, mask, data); in _rtw_write32s_mask()
H A Dmac80211.c357 rtw_write32_mask(rtwdev, edca_param, BIT_MASK_TXOP_LMT, params->txop); in __rtw_conf_tx()
358 rtw_write32_mask(rtwdev, edca_param, BIT_MASK_CWMAX, ecw_max); in __rtw_conf_tx()
359 rtw_write32_mask(rtwdev, edca_param, BIT_MASK_CWMIN, ecw_min); in __rtw_conf_tx()
360 rtw_write32_mask(rtwdev, edca_param, BIT_MASK_AIFS, aifs); in __rtw_conf_tx()
H A Dphy.c164 rtw_write32_mask(rtwdev, in rtw_phy_set_edcca_th()
168 rtw_write32_mask(rtwdev, in rtw_phy_set_edcca_th()
272 rtw_write32_mask(rtwdev, dig_cck->addr, dig_cck->mask, igi >> 1); in rtw_phy_dig_write()
278 rtw_write32_mask(rtwdev, addr, mask, igi); in rtw_phy_dig_write()
1066 rtw_write32_mask(rtwdev, direct_addr, mask, data); in rtw_phy_write_rf_reg()
1839 rtw_write32_mask(rtwdev, 0x1e24, BIT(17), 0x1); in rtw_load_rfk_table()
1840 rtw_write32_mask(rtwdev, 0x1cd0, BIT(28), 0x1); in rtw_load_rfk_table()
1841 rtw_write32_mask(rtwdev, 0x1cd0, BIT(29), 0x1); in rtw_load_rfk_table()
1842 rtw_write32_mask(rtwdev, 0x1cd0, BIT(30), 0x1); in rtw_load_rfk_table()
1843 rtw_write32_mask(rtwdev, 0x1cd0, BIT(31), 0x0); in rtw_load_rfk_table()
H A Drtw8723x.h466 rtw_write32_mask(rtwdev, REG_PAD_CTRL1, BIT_BT_BTG_SEL, 0x1); in rtw8723x_iqk_config_path_ctrl()
498 rtw_write32_mask(rtwdev, REG_LTECOEX_PATH_CONTROL, in rtw8723x_iqk_config_lte_path_gnt()
H A Dhci.h234 rtw_write32_mask(struct rtw_dev *rtwdev, u32 addr, u32 mask, u32 data) in rtw_write32_mask() function
H A Dbf.c376 rtw_write32_mask(rtwdev, REG_BBPSF_CTRL, BIT_MASK_CSI_RATE, in rtw_bf_phy_init()
H A Dmain.c949 rtw_write32_mask(rtwdev, addr, mask, rtwvif->net_type); in rtw_vif_port_config()
954 rtw_write32_mask(rtwdev, addr, mask, rtwvif->aid); in rtw_vif_port_config()
2351 rtw_write32_mask(rtwdev, reg2->addr, reg2->mask, v1); in rtw_swap_reg_mask()
2352 rtw_write32_mask(rtwdev, reg1->addr, reg1->mask, v2); in rtw_swap_reg_mask()
H A Dpci.c1295 rtw_write32_mask(rtwdev, REG_PCIE_MIX_CFG, BIT_MDIO_WFLAG_V1, 1); in rtw_mdio_write()
1443 rtw_write32_mask(rtwdev, REG_HCI_MIX_CFG, in rtw_pci_interface_cfg()
1506 rtw_write32_mask(rtwdev, REG_ANAPARSW_MAC_0, BIT_CF_L_V2, 0x1); in rtw_pci_phy_cfg()