Searched refs:rp0_freq (Results 1 – 8 of 8) sorted by relevance
134 step = (slpc->rp0_freq - slpc->min_freq) / NUM_STEPS; in vary_max_freq()136 for (max_freq = slpc->rp0_freq; max_freq > slpc->min_freq; in vary_max_freq()170 step = (slpc->rp0_freq - slpc->min_freq) / NUM_STEPS; in vary_min_freq()172 for (min_freq = slpc->min_freq; min_freq < slpc->rp0_freq; in vary_min_freq()221 max.freq = slpc->rp0_freq; in slpc_power()244 slpc_set_max_freq(slpc, slpc->rp0_freq); in slpc_power()256 err = slpc_set_min_freq(slpc, slpc->rp0_freq); in max_granted_freq()261 if (*max_act_freq != slpc->rp0_freq) { in max_granted_freq()292 if (slpc->min_freq == slpc->rp0_freq) { in run_test()
50 u8 rp0_freq; member94 u8 rp0_freq; /* Non-overclocked max frequency. */ member
756 else if (val >= rps->rp0_freq && in gen6_rps_set_thresholds()1159 caps->rp0_freq *= GEN9_FREQ_SCALER; in __gen6_rps_get_freq_caps()1189 rps->rp0_freq = caps.rp0_freq; in gen6_rps_init()1194 rps->max_freq = rps->rp0_freq; in gen6_rps_init()1709 rps->rp0_freq = rps->max_freq; in vlv_rps_init()1743 rps->rp0_freq = rps->max_freq; in chv_rps_init()2236 return slpc->rp0_freq; in intel_rps_get_rp0_frequency()2404 intel_gpu_freq(rps, caps.rp0_freq)); in rps_frequency_dump()2483 if (val > rps->rp0_freq) in set_max_freq()2669 ((caps.rp0_freq << in intel_rps_raise_unslice()[all …]
302 if (freq < pc->rpn_freq || freq > pc->rp0_freq) in pc_set_min_freq()334 if (freq < pc->rpn_freq || freq > pc->rp0_freq) in pc_set_max_freq()501 return pc->rp0_freq; in xe_guc_pc_get_rp0_freq()732 pc->rp0_freq = decode_freq(REG_FIELD_GET(MTL_RP0_CAP_MASK, reg)); in mtl_init_fused_rp_values()770 return min(LNL_MERT_FREQ_CAP, pc->rp0_freq); in pc_max_freq_cap()772 return min(BMG_MERT_FREQ_CAP, pc->rp0_freq); in pc_max_freq_cap()774 return pc->rp0_freq; in pc_max_freq_cap()818 if (pc_get_max_freq(pc) > pc->rp0_freq) { in pc_adjust_freq_bounds()819 ret = pc_set_max_freq(pc, pc->rp0_freq); in pc_adjust_freq_bounds()828 if (pc_get_min_freq(pc) > pc->rp0_freq) in pc_adjust_freq_bounds()[all …]
19 u32 rp0_freq; member
102 static DEVICE_ATTR_RO(rp0_freq);
432 val > slpc->rp0_freq || in intel_guc_slpc_set_max_freq()526 val > slpc->rp0_freq || in intel_guc_slpc_set_min_freq()661 slpc->max_freq_softlimit = slpc->rp0_freq; in slpc_set_softlimits()663 } else if (slpc->max_freq_softlimit != slpc->rp0_freq) { in slpc_set_softlimits()708 slpc->min_freq_softlimit = slpc->rp0_freq; in update_server_min_softlimit()718 slpc->rp0_freq); in slpc_use_fused_rp0()727 slpc->rp0_freq = intel_gpu_freq(rps, caps.rp0_freq); in slpc_get_rp_values()732 slpc->boost_freq = slpc->rp0_freq; in slpc_get_rp_values()811 if (val < slpc->min_freq || val > slpc->rp0_freq) in intel_guc_slpc_set_boost_freq()
27 u32 rp0_freq; member