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Searched refs:reset_mask (Results 1 – 25 of 27) sorted by relevance

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/linux-6.15/drivers/clk/sunxi/
H A Dclk-usb.c81 u32 reset_mask; member
144 if (data->reset_mask == 0) in sunxi_usb_clk_setup()
162 reset_data->rcdev.nr_resets = __fls(data->reset_mask) + 1; in sunxi_usb_clk_setup()
170 .reset_mask = BIT(2) | BIT(1) | BIT(0),
183 .reset_mask = BIT(1) | BIT(0),
194 .reset_mask = BIT(2) | BIT(1) | BIT(0),
205 .reset_mask = BIT(2) | BIT(1) | BIT(0),
217 .reset_mask = BIT(3) | BIT(2) | BIT(1) | BIT(0),
228 .reset_mask = BIT(19) | BIT(18) | BIT(17),
242 .reset_mask = BIT(21) | BIT(20) | BIT(19) | BIT(18) | BIT(17),
/linux-6.15/drivers/gpu/drm/radeon/
H A Dni.c1722 u32 reset_mask = 0; in cayman_gpu_check_soft_reset() local
1733 reset_mask |= RADEON_RESET_GFX; in cayman_gpu_check_soft_reset()
1737 reset_mask |= RADEON_RESET_CP; in cayman_gpu_check_soft_reset()
1745 reset_mask |= RADEON_RESET_DMA; in cayman_gpu_check_soft_reset()
1766 reset_mask |= RADEON_RESET_IH; in cayman_gpu_check_soft_reset()
1779 reset_mask |= RADEON_RESET_MC; in cayman_gpu_check_soft_reset()
1795 return reset_mask; in cayman_gpu_check_soft_reset()
1804 if (reset_mask == 0) in cayman_gpu_soft_reset()
1932 u32 reset_mask; in cayman_asic_reset() local
1941 if (reset_mask) in cayman_asic_reset()
[all …]
H A Dr600.c1617 u32 reset_mask = 0; in r600_gpu_check_soft_reset() local
1640 reset_mask |= RADEON_RESET_CP; in r600_gpu_check_soft_reset()
1648 reset_mask |= RADEON_RESET_DMA; in r600_gpu_check_soft_reset()
1653 reset_mask |= RADEON_RESET_RLC; in r600_gpu_check_soft_reset()
1656 reset_mask |= RADEON_RESET_IH; in r600_gpu_check_soft_reset()
1670 reset_mask |= RADEON_RESET_MC; in r600_gpu_check_soft_reset()
1681 return reset_mask; in r600_gpu_check_soft_reset()
1690 if (reset_mask == 0) in r600_gpu_soft_reset()
1883 u32 reset_mask; in r600_asic_reset() local
1892 if (reset_mask) in r600_asic_reset()
[all …]
H A Devergreen.c3827 u32 reset_mask = 0; in evergreen_gpu_check_soft_reset() local
3837 reset_mask |= RADEON_RESET_GFX; in evergreen_gpu_check_soft_reset()
3841 reset_mask |= RADEON_RESET_CP; in evergreen_gpu_check_soft_reset()
3849 reset_mask |= RADEON_RESET_DMA; in evergreen_gpu_check_soft_reset()
3862 reset_mask |= RADEON_RESET_IH; in evergreen_gpu_check_soft_reset()
3875 reset_mask |= RADEON_RESET_MC; in evergreen_gpu_check_soft_reset()
3891 return reset_mask; in evergreen_gpu_check_soft_reset()
3900 if (reset_mask == 0) in evergreen_gpu_soft_reset()
4052 u32 reset_mask; in evergreen_asic_reset() local
4061 if (reset_mask) in evergreen_asic_reset()
[all …]
H A Dsi.c3756 u32 reset_mask = 0; in si_gpu_check_soft_reset() local
3767 reset_mask |= RADEON_RESET_GFX; in si_gpu_check_soft_reset()
3771 reset_mask |= RADEON_RESET_CP; in si_gpu_check_soft_reset()
3779 reset_mask |= RADEON_RESET_RLC; in si_gpu_check_soft_reset()
3803 reset_mask |= RADEON_RESET_IH; in si_gpu_check_soft_reset()
3816 reset_mask |= RADEON_RESET_MC; in si_gpu_check_soft_reset()
3832 return reset_mask; in si_gpu_check_soft_reset()
3841 if (reset_mask == 0) in si_gpu_soft_reset()
4069 u32 reset_mask; in si_asic_reset() local
4078 if (reset_mask) in si_asic_reset()
[all …]
H A Devergreen_dma.c172 u32 reset_mask = evergreen_gpu_check_soft_reset(rdev); in evergreen_dma_is_lockup() local
174 if (!(reset_mask & RADEON_RESET_DMA)) { in evergreen_dma_is_lockup()
H A Dcik.c4844 u32 reset_mask = 0; in cik_gpu_check_soft_reset() local
4855 reset_mask |= RADEON_RESET_GFX; in cik_gpu_check_soft_reset()
4858 reset_mask |= RADEON_RESET_CP; in cik_gpu_check_soft_reset()
4863 reset_mask |= RADEON_RESET_RLC; in cik_gpu_check_soft_reset()
4887 reset_mask |= RADEON_RESET_IH; in cik_gpu_check_soft_reset()
4900 reset_mask |= RADEON_RESET_MC; in cik_gpu_check_soft_reset()
4911 return reset_mask; in cik_gpu_check_soft_reset()
4928 if (reset_mask == 0) in cik_gpu_soft_reset()
5211 u32 reset_mask; in cik_asic_reset() local
5220 if (reset_mask) in cik_asic_reset()
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H A Dsi_dma.c42 u32 reset_mask = si_gpu_check_soft_reset(rdev); in si_dma_is_lockup() local
50 if (!(reset_mask & mask)) { in si_dma_is_lockup()
H A Dr600_dma.c209 u32 reset_mask = r600_gpu_check_soft_reset(rdev); in r600_dma_is_lockup() local
211 if (!(reset_mask & RADEON_RESET_DMA)) { in r600_dma_is_lockup()
H A Dni_dma.c288 u32 reset_mask = cayman_gpu_check_soft_reset(rdev); in cayman_dma_is_lockup() local
296 if (!(reset_mask & mask)) { in cayman_dma_is_lockup()
H A Dcik_sdma.c776 u32 reset_mask = cik_gpu_check_soft_reset(rdev); in cik_sdma_is_lockup() local
784 if (!(reset_mask & mask)) { in cik_sdma_is_lockup()
/linux-6.15/drivers/reset/
H A Dreset-ti-sci.c25 u32 reset_mask; member
83 reset_state |= control->reset_mask; in ti_sci_reset_set()
85 reset_state &= ~control->reset_mask; in ti_sci_reset_set()
161 return reset_state & control->reset_mask; in ti_sci_reset_status()
198 control->reset_mask = reset_spec->args[1]; in ti_sci_reset_of_xlate()
/linux-6.15/drivers/gpu/drm/i915/gt/
H A Dintel_gt_pm_irq.c62 void gen6_gt_pm_reset_iir(struct intel_gt *gt, u32 reset_mask) in gen6_gt_pm_reset_iir() argument
69 intel_uncore_write(uncore, reg, reset_mask); in gen6_gt_pm_reset_iir()
70 intel_uncore_write(uncore, reg, reset_mask); in gen6_gt_pm_reset_iir()
H A Dintel_reset.c412 u32 *reset_mask, in gen11_lock_sfc() argument
499 *reset_mask |= sfc_lock.reset_bit; in gen11_lock_sfc()
528 u32 reset_mask, unlock_mask = 0; in __gen11_reset_engines() local
532 reset_mask = GEN11_GRDOM_FULL; in __gen11_reset_engines()
534 reset_mask = 0; in __gen11_reset_engines()
536 reset_mask |= engine->reset_domain; in __gen11_reset_engines()
543 ret = gen6_hw_domain_reset(gt, reset_mask); in __gen11_reset_engines()
784 intel_engine_mask_t reset_mask; in __intel_gt_reset() local
788 GT_TRACE(gt, "engine_mask=%x\n", reset_mask); in __intel_gt_reset()
789 ret = reset(gt, reset_mask, retry); in __intel_gt_reset()
[all …]
H A Dintel_gt_pm_irq.h19 void gen6_gt_pm_reset_iir(struct intel_gt *gt, u32 reset_mask);
/linux-6.15/drivers/clk/
H A Dclk-twl6040.c33 const u8 reset_mask = TWL6040_HPLLRST; /* Same for HPPLL and LPPLL */ in twl6040_pdmclk_reset_one_clock() local
36 ret = twl6040_set_bits(pdmclk->twl6040, reg, reset_mask); in twl6040_pdmclk_reset_one_clock()
40 ret = twl6040_clear_bits(pdmclk->twl6040, reg, reset_mask); in twl6040_pdmclk_reset_one_clock()
/linux-6.15/drivers/net/ethernet/ibm/
H A Dibmveth.h73 unsigned long reset_mask, unsigned long set_mask, in h_illan_attributes() argument
80 reset_mask, set_mask); in h_illan_attributes()
/linux-6.15/drivers/watchdog/
H A Daspeed_wdt.c484 u32 reset_mask[2]; in aspeed_wdt_probe() local
504 ret = of_property_read_u32_array(np, "aspeed,reset-mask", reset_mask, nrstmask); in aspeed_wdt_probe()
506 writel(reset_mask[0], wdt->base + WDT_RESET_MASK1); in aspeed_wdt_probe()
508 writel(reset_mask[1], wdt->base + WDT_RESET_MASK2); in aspeed_wdt_probe()
/linux-6.15/drivers/cxl/core/
H A Dfeatures.c546 u16 effects, imm_mask, reset_mask; in cxlctl_validate_set_features() local
581 reset_mask = CXL_CMD_CONFIG_CHANGE_COLD_RESET | in cxlctl_validate_set_features()
586 if (!(effects & imm_mask) && !(effects & reset_mask)) in cxlctl_validate_set_features()
/linux-6.15/sound/soc/tegra/
H A Dtegra210_i2s.c92 unsigned int reset_mask = I2S_SOFT_RESET_MASK; in tegra210_i2s_sw_reset() local
114 regmap_update_bits(i2s->regmap, reset_reg, reset_mask, reset_en); in tegra210_i2s_sw_reset()
117 !(val & reset_mask & reset_en), in tegra210_i2s_sw_reset()
/linux-6.15/drivers/crypto/intel/qat/qat_common/
H A Dqat_hal.c304 unsigned int reset_mask = handle->chip_info->icp_rst_mask; in qat_hal_reset() local
309 csr_val |= reset_mask; in qat_hal_reset()
476 unsigned int reset_mask = handle->chip_info->icp_rst_mask; in qat_hal_clr_reset() local
485 csr_val &= ~reset_mask; in qat_hal_clr_reset()
491 csr_val &= reset_mask; in qat_hal_clr_reset()
495 csr_val |= reset_mask; in qat_hal_clr_reset()
/linux-6.15/drivers/net/ethernet/smsc/
H A Dsmsc911x.c1448 unsigned int reset_mask = HW_CFG_SRST_; in smsc911x_soft_reset() local
1478 reset_mask = RESET_CTL_DIGITAL_RST_; in smsc911x_soft_reset()
1482 smsc911x_reg_write(pdata, reset_offset, reset_mask); in smsc911x_soft_reset()
1489 } while ((--timeout) && (temp & reset_mask)); in smsc911x_soft_reset()
1491 if (unlikely(temp & reset_mask)) { in smsc911x_soft_reset()
/linux-6.15/drivers/net/wireless/ath/ath10k/
H A Dhw.h290 u32 reset_mask; member
H A Dhw.c371 .reset_mask = 0xffffffff,
H A Dhtt_tx.c631 int ath10k_htt_h2t_stats_req(struct ath10k_htt *htt, u32 mask, u32 reset_mask, in ath10k_htt_h2t_stats_req() argument
659 memcpy(req->reset_types, &reset_mask, 3); in ath10k_htt_h2t_stats_req()

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