| /linux-6.15/scripts/atomic/kerneldoc/ |
| H A D | inc_unless_negative | 7 * Otherwise, @v is not modified and relaxed ordering is provided.
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| H A D | inc_not_zero | 7 * Otherwise, @v is not modified and relaxed ordering is provided.
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| H A D | dec_unless_positive | 7 * Otherwise, @v is not modified and relaxed ordering is provided.
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| H A D | dec_if_positive | 7 * Otherwise, @v is not modified and relaxed ordering is provided.
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| H A D | cmpxchg | 9 * Otherwise, @v is not modified and relaxed ordering is provided.
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| H A D | add_unless | 13 * Otherwise, @v is not modified and relaxed ordering is provided.
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| H A D | try_cmpxchg | 10 * and relaxed ordering is provided.
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| /linux-6.15/Documentation/devicetree/bindings/ |
| H A D | .yamllint | 1 extends: relaxed
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| /linux-6.15/Documentation/admin-guide/perf/ |
| H A D | nvidia-pmu.rst | 62 In this config, the PMU captures read and relaxed ordered (RO) writes from
155 to local memory. For PCIE traffic, this PMU captures read and relaxed ordered
282 PCIE2 traffic represents reads and relaxed ordered (RO) writes.
333 PCIE2 traffic represents reads and relaxed ordered (RO) writes.
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| /linux-6.15/scripts/atomic/ |
| H A D | atomics.tbl | 4 # Upper-case implies _{acquire,release,relaxed} variants.
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| /linux-6.15/tools/memory-model/Documentation/ |
| H A D | cheatsheet.txt | 20 Key: Relaxed: A relaxed operation is either READ_ONCE(), WRITE_ONCE(),
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| /linux-6.15/lib/ |
| H A D | Kconfig.kmsan | 47 is a more relaxed mode, but it generates more instrumentation code and
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| /linux-6.15/include/linux/ |
| H A D | coresight.h | 131 u64 (*read)(u32 offset, bool relaxed, bool _64bit);
132 void (*write)(u64 val, u32 offset, bool relaxed,
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| /linux-6.15/Documentation/driver-api/ |
| H A D | device-io.rst | 71 indicate the relaxed ordering. Use this with care.
112 these cases, although only some platforms will honor the relaxed
113 semantics. Using the relaxed read functions will provide significant
183 DMA, these "relaxed" versions of the MMIO accessors only serialize against
190 guarantees of the non-relaxed and relaxed versions.
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| /linux-6.15/Documentation/filesystems/ |
| H A D | isofs.rst | 33 check=relaxed Matches filenames with different cases
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| H A D | nilfs2.rst | 66 order=relaxed(*) Apply relaxed order semantics that allows modified data
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| /linux-6.15/Documentation/core-api/ |
| H A D | this_cpu_ops.rst | 27 sort of relaxed atomicity guarantees. The x86, for example, can execute
319 relaxed synchronization requirements for this_cpu operations.
323 share a cache-line but the relaxed synchronization is applied to
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| /linux-6.15/Documentation/devicetree/bindings/pci/ |
| H A D | pci.txt | 71 trusted with relaxed DMA protection, as users could easily attach
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| /linux-6.15/drivers/gpu/drm/rockchip/ |
| H A D | rockchip_drm_vop.h | 55 bool relaxed; member
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| /linux-6.15/drivers/scsi/csiostor/ |
| H A D | csio_mb.c | 495 int relaxed = !(hw->flags & CSIO_HWF_ROOT_NO_RELAXED_ORDERING); in csio_mb_iq_write() local
542 FW_IQ_CMD_FL0FETCHRO_V(relaxed) | in csio_mb_iq_write()
543 FW_IQ_CMD_FL0DATARO_V(relaxed) | in csio_mb_iq_write()
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| /linux-6.15/Documentation/scheduler/ |
| H A D | sched-domains.rst | 12 be relaxed if the need arises), and a base domain for CPU i MUST span at least
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| /linux-6.15/arch/mips/configs/ |
| H A D | loongson3_defconfig | 400 CONFIG_CMDLINE="ieee754=relaxed"
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| /linux-6.15/drivers/net/ethernet/chelsio/cxgb4vf/ |
| H A D | sge.c | 2210 int relaxed = !(adapter->flags & CXGB4VF_ROOT_NO_RELAXED_ORDERING); in t4vf_sge_alloc_rxq() local
2307 FW_IQ_CMD_FL0FETCHRO_V(relaxed) | in t4vf_sge_alloc_rxq()
2308 FW_IQ_CMD_FL0DATARO_V(relaxed) | in t4vf_sge_alloc_rxq()
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| /linux-6.15/Documentation/networking/ |
| H A D | msg_zerocopy.rst | 261 loopback restriction can be temporarily relaxed by making
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| /linux-6.15/Documentation/filesystems/bcachefs/ |
| H A D | CodingStyle.rst | 167 come from relaxed conversations where people aren't afraid to say "what if?".
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