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Searched refs:regvalue (Results 1 – 17 of 17) sorted by relevance

/linux-6.15/drivers/scsi/aic7xxx/
H A Daic79xx_reg_print.c_shipped27 0x01, regvalue, cur_col, wrap));
39 0x0b, regvalue, cur_col, wrap));
54 0x0c, regvalue, cur_col, wrap));
72 0x18, regvalue, cur_col, wrap));
93 0x19, regvalue, cur_col, wrap));
110 0x1a, regvalue, cur_col, wrap));
124 0x1b, regvalue, cur_col, wrap));
139 0x3a, regvalue, cur_col, wrap));
155 0x3b, regvalue, cur_col, wrap));
171 0x3f, regvalue, cur_col, wrap));
[all …]
H A Daic7xxx_reg_print.c_shipped26 0x00, regvalue, cur_col, wrap));
43 0x01, regvalue, cur_col, wrap));
70 0x03, regvalue, cur_col, wrap));
86 0x04, regvalue, cur_col, wrap));
105 0x0b, regvalue, cur_col, wrap));
123 0x0c, regvalue, cur_col, wrap));
141 0x0d, regvalue, cur_col, wrap));
154 0x0e, regvalue, cur_col, wrap));
172 0x10, regvalue, cur_col, wrap));
190 0x11, regvalue, cur_col, wrap));
[all …]
H A Daic79xx_reg.h_shipped18 #define ahd_intstat_print(regvalue, cur_col, wrap) \
25 #define ahd_hs_mailbox_print(regvalue, cur_col, wrap) \
32 #define ahd_seqintstat_print(regvalue, cur_col, wrap) \
39 #define ahd_intctl_print(regvalue, cur_col, wrap) \
46 #define ahd_dfcntrl_print(regvalue, cur_col, wrap) \
53 #define ahd_dfstatus_print(regvalue, cur_col, wrap) \
81 #define ahd_dffstat_print(regvalue, cur_col, wrap) \
109 #define ahd_selid_print(regvalue, cur_col, wrap) \
123 #define ahd_sstat0_print(regvalue, cur_col, wrap) \
130 #define ahd_sstat1_print(regvalue, cur_col, wrap) \
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H A Daic7xxx_reg.h_shipped18 #define ahc_scsiseq_print(regvalue, cur_col, wrap) \
25 #define ahc_sxfrctl0_print(regvalue, cur_col, wrap) \
32 #define ahc_scsisigi_print(regvalue, cur_col, wrap) \
39 #define ahc_scsirate_print(regvalue, cur_col, wrap) \
46 #define ahc_sstat0_print(regvalue, cur_col, wrap) \
53 #define ahc_sstat1_print(regvalue, cur_col, wrap) \
60 #define ahc_sstat2_print(regvalue, cur_col, wrap) \
67 #define ahc_sstat3_print(regvalue, cur_col, wrap) \
74 #define ahc_simode0_print(regvalue, cur_col, wrap) \
116 #define ahc_seqctl_print(regvalue, cur_col, wrap) \
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/linux-6.15/drivers/hwmon/
H A Dgl518sm.c306 int regvalue; \
313 regvalue = gl518_read_value(client, reg); \
315 regvalue = (regvalue & ~mask) | (data->value << shift); \
316 gl518_write_value(client, reg, regvalue); \
347 int regvalue; in fan_min_store() local
356 regvalue = gl518_read_value(client, GL518_REG_FAN_LIMIT); in fan_min_store()
358 regvalue = (regvalue & (0xff << (8 * nr))) in fan_min_store()
381 int regvalue; in fan_div_store() local
410 regvalue = gl518_read_value(client, GL518_REG_MISC); in fan_div_store()
412 regvalue = (regvalue & ~(0xc0 >> (2 * nr))) in fan_div_store()
[all …]
/linux-6.15/sound/soc/mediatek/mt2701/
H A Dmt2701-afe-pcm.c37 unsigned int regvalue; member
41 { .rate = 8000, .regvalue = 0 },
42 { .rate = 12000, .regvalue = 1 },
43 { .rate = 16000, .regvalue = 2 },
44 { .rate = 24000, .regvalue = 3 },
45 { .rate = 32000, .regvalue = 4 },
46 { .rate = 48000, .regvalue = 5 },
47 { .rate = 96000, .regvalue = 6 },
48 { .rate = 192000, .regvalue = 7 },
49 { .rate = 384000, .regvalue = 8 },
[all …]
/linux-6.15/sound/soc/mediatek/mt8173/
H A Dmt8173-afe-pcm.c166 unsigned int regvalue; member
170 { .rate = 8000, .regvalue = 0 },
171 { .rate = 11025, .regvalue = 1 },
172 { .rate = 12000, .regvalue = 2 },
173 { .rate = 16000, .regvalue = 4 },
174 { .rate = 22050, .regvalue = 5 },
175 { .rate = 24000, .regvalue = 6 },
176 { .rate = 32000, .regvalue = 8 },
177 { .rate = 44100, .regvalue = 9 },
178 { .rate = 48000, .regvalue = 10 },
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/linux-6.15/drivers/clk/mstar/
H A Dclk-msc313-cpupll.c89 static void msc313_cpupll_setfreq(struct msc313_cpupll *cpupll, u32 regvalue) in msc313_cpupll_setfreq() argument
93 msc313_cpupll_reg_write32(cpupll, REG_LPF_HIGH_BOTTOM, regvalue); in msc313_cpupll_setfreq()
114 msc313_cpupll_reg_write32(cpupll, REG_LPF_LOW_L, regvalue); in msc313_cpupll_setfreq()
/linux-6.15/sound/soc/codecs/
H A Drt712-sdca-dmic.c253 unsigned int regvalue, ctl, i; in rt712_sdca_dmic_set_gain_get() local
262 regmap_read(rt712->mbq_regmap, p->reg_base + i, &regvalue); in rt712_sdca_dmic_set_gain_get()
265 ctl = regvalue / 0x0a00; in rt712_sdca_dmic_set_gain_get()
268 ctl = p->max - (((0x1e00 - regvalue) & 0xffff) / interval_offset); in rt712_sdca_dmic_set_gain_get()
270 ctl = p->max - (((0 - regvalue) & 0xffff) / interval_offset); in rt712_sdca_dmic_set_gain_get()
288 unsigned int regvalue[4]; in rt712_sdca_dmic_set_gain_put() local
297 regmap_read(rt712->mbq_regmap, p->reg_base + i, &regvalue[i]); in rt712_sdca_dmic_set_gain_put()
310 if (regvalue[i] != gain_val[i]) in rt712_sdca_dmic_set_gain_put()
H A Dalc5632.c619 u16 regvalue; member
710 pll_div = codec_master_pll_div[i].regvalue; in alc5632_set_dai_pll()
721 pll_div = codec_slave_pll_div[i].regvalue; in alc5632_set_dai_pll()
732 pll_div = codec_slave_pll_div[i].regvalue; in alc5632_set_dai_pll()
766 u16 regvalue; member
899 coeff = coeff_div[coeff].regvalue; in alc5632_pcm_hw_params()
H A Dalc5623.c470 u16 regvalue; member
550 pll_div = codec_master_pll_div[i].regvalue; in alc5623_set_dai_pll()
561 pll_div = codec_slave_pll_div[i].regvalue; in alc5623_set_dai_pll()
586 u16 regvalue; member
732 coeff = coeff_div[coeff].regvalue; in alc5623_pcm_hw_params()
H A Drt1320-sdw.c845 unsigned int regvalue[4], gain_val[4], i; in rt1320_set_gain_put() local
884 regmap_read(rt1320->mbq_regmap, reg_base + i, &regvalue[i]); in rt1320_set_gain_put()
887 regmap_read(rt1320->mbq_regmap, reg_base + i - 2, &regvalue[i]); in rt1320_set_gain_put()
896 if (regvalue[i] != gain_val[i]) in rt1320_set_gain_put()
929 unsigned int reg_base, regvalue, ctl, i; in rt1320_set_gain_get() local
956 regmap_read(rt1320->mbq_regmap, reg_base + i, &regvalue); in rt1320_set_gain_get()
959 regmap_read(rt1320->mbq_regmap, reg_base + i - 2, &regvalue); in rt1320_set_gain_get()
962 ctl = p->max - (((0x1e00 - regvalue) & 0xffff) / interval_offset); in rt1320_set_gain_get()
H A Drt722-sdca.c600 unsigned int regvalue, ctl, i; in rt722_sdca_dmic_set_gain_get() local
609 regmap_read(rt722->regmap, p->reg_base + i, &regvalue); in rt722_sdca_dmic_set_gain_get()
612 ctl = regvalue / boost_step; in rt722_sdca_dmic_set_gain_get()
614 ctl = p->max - (((vol_max - regvalue) & 0xffff) / interval_offset); in rt722_sdca_dmic_set_gain_get()
633 unsigned int regvalue[4]; in rt722_sdca_dmic_set_gain_put() local
642 regmap_read(rt722->regmap, p->reg_base + i, &regvalue[i]); in rt722_sdca_dmic_set_gain_put()
655 if (regvalue[i] != gain_val[i]) in rt722_sdca_dmic_set_gain_put()
H A Drt721-sdca.c603 unsigned int regvalue, ctl, i; in rt721_sdca_dmic_set_gain_get() local
612 regmap_read(rt721->mbq_regmap, p->reg_base + i, &regvalue); in rt721_sdca_dmic_set_gain_get()
615 ctl = regvalue / boost_step; in rt721_sdca_dmic_set_gain_get()
617 ctl = p->max - (((vol_max - regvalue) & 0xffff) / interval_offset); in rt721_sdca_dmic_set_gain_get()
636 unsigned int regvalue[4]; in rt721_sdca_dmic_set_gain_put() local
645 regmap_read(rt721->mbq_regmap, p->reg_base + i, &regvalue[i]); in rt721_sdca_dmic_set_gain_put()
658 if (regvalue[i] != gain_val[i]) in rt721_sdca_dmic_set_gain_put()
H A Drt712-sdca.c1055 unsigned int regvalue, ctl, i; in rt712_sdca_dmic_set_gain_get() local
1064 regmap_read(rt712->mbq_regmap, p->reg_base + i, &regvalue); in rt712_sdca_dmic_set_gain_get()
1067 ctl = regvalue / 0x0a00; in rt712_sdca_dmic_set_gain_get()
1070 ctl = p->max - (((0x1e00 - regvalue) & 0xffff) / interval_offset); in rt712_sdca_dmic_set_gain_get()
1072 ctl = p->max - (((0 - regvalue) & 0xffff) / interval_offset); in rt712_sdca_dmic_set_gain_get()
1090 unsigned int regvalue[4]; in rt712_sdca_dmic_set_gain_put() local
1099 regmap_read(rt712->mbq_regmap, p->reg_base + i, &regvalue[i]); in rt712_sdca_dmic_set_gain_put()
1112 if (regvalue[i] != gain_val[i]) in rt712_sdca_dmic_set_gain_put()
/linux-6.15/drivers/net/ethernet/intel/igb/
H A De1000_mac.c1620 u32 i, regvalue = 0; in igb_write_8bit_ctrl_reg() local
1624 regvalue = ((u32)data) | (offset << E1000_GEN_CTL_ADDRESS_SHIFT); in igb_write_8bit_ctrl_reg()
1625 wr32(reg, regvalue); in igb_write_8bit_ctrl_reg()
1630 regvalue = rd32(reg); in igb_write_8bit_ctrl_reg()
1631 if (regvalue & E1000_GEN_CTL_READY) in igb_write_8bit_ctrl_reg()
1634 if (!(regvalue & E1000_GEN_CTL_READY)) { in igb_write_8bit_ctrl_reg()
/linux-6.15/drivers/mmc/host/
H A Dvub300.c291 unsigned regvalue:8; member
556 vub300->sdio_register[i].regvalue = in add_offloaded_reg()
1877 u8 rsp3 = vub300->sdio_register[i].regvalue; in satisfy_request_from_offloaded_data()