Searched refs:reg_val_offs (Results 1 – 9 of 9) sorted by relevance
| /linux-6.15/drivers/gpu/drm/amd/amdgpu/ |
| H A D | amdgpu_gfx.c | 1058 uint32_t seq, reg_val_offs = 0, value = 0; in amdgpu_kiq_rreg() local
1071 if (amdgpu_device_wb_get(adev, ®_val_offs)) { in amdgpu_kiq_rreg()
1079 amdgpu_ring_emit_rreg(ring, reg, reg_val_offs); in amdgpu_kiq_rreg()
1110 value = adev->wb.wb[reg_val_offs]; in amdgpu_kiq_rreg()
1111 amdgpu_device_wb_free(adev, reg_val_offs); in amdgpu_kiq_rreg()
1119 if (reg_val_offs) in amdgpu_kiq_rreg()
1120 amdgpu_device_wb_free(adev, reg_val_offs); in amdgpu_kiq_rreg()
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| H A D | amdgpu_virt.h | 260 uint32_t reg_val_offs; member
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| H A D | gfx_v9_0.c | 4177 uint32_t seq, reg_val_offs = 0; in gfx_v9_0_kiq_read_clock() local
4185 if (amdgpu_device_wb_get(adev, ®_val_offs)) { in gfx_v9_0_kiq_read_clock()
4198 reg_val_offs * 4)); in gfx_v9_0_kiq_read_clock()
4200 reg_val_offs * 4)); in gfx_v9_0_kiq_read_clock()
4231 value = (uint64_t)adev->wb.wb[reg_val_offs] | in gfx_v9_0_kiq_read_clock()
4233 amdgpu_device_wb_free(adev, reg_val_offs); in gfx_v9_0_kiq_read_clock()
4241 if (reg_val_offs) in gfx_v9_0_kiq_read_clock()
4242 amdgpu_device_wb_free(adev, reg_val_offs); in gfx_v9_0_kiq_read_clock()
5877 uint32_t reg_val_offs) in gfx_v9_0_ring_emit_rreg() argument
5888 reg_val_offs * 4)); in gfx_v9_0_ring_emit_rreg()
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| H A D | amdgpu_ring.h | 222 uint32_t reg_val_offs);
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| H A D | gfx_v9_4_3.c | 2945 uint32_t reg_val_offs) in gfx_v9_4_3_ring_emit_rreg() argument
2958 reg_val_offs * 4)); in gfx_v9_4_3_ring_emit_rreg()
2960 reg_val_offs * 4)); in gfx_v9_4_3_ring_emit_rreg()
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| H A D | gfx_v12_0.c | 4553 uint32_t reg_val_offs) in gfx_v12_0_ring_emit_rreg() argument
4564 reg_val_offs * 4)); in gfx_v12_0_ring_emit_rreg()
4566 reg_val_offs * 4)); in gfx_v12_0_ring_emit_rreg()
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| H A D | gfx_v8_0.c | 6328 uint32_t reg_val_offs) in gfx_v8_0_ring_emit_rreg() argument
6339 reg_val_offs * 4)); in gfx_v8_0_ring_emit_rreg()
6341 reg_val_offs * 4)); in gfx_v8_0_ring_emit_rreg()
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| H A D | gfx_v11_0.c | 6092 uint32_t reg_val_offs) in gfx_v11_0_ring_emit_rreg() argument
6103 reg_val_offs * 4)); in gfx_v11_0_ring_emit_rreg()
6105 reg_val_offs * 4)); in gfx_v11_0_ring_emit_rreg()
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| H A D | gfx_v10_0.c | 8952 uint32_t reg_val_offs) in gfx_v10_0_ring_emit_rreg() argument
8963 reg_val_offs * 4)); in gfx_v10_0_ring_emit_rreg()
8965 reg_val_offs * 4)); in gfx_v10_0_ring_emit_rreg()
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