Searched refs:reg_pma (Results 1 – 5 of 5) sorted by relevance
39 writel(cfg->val, (phy)->reg_pma + cfg->off_0); in samsung_ufs_phy_config()43 writel(cfg->val, (phy)->reg_pma + cfg->off_1); in samsung_ufs_phy_config()57 ufs_phy->reg_pma + PHY_APB_ADDR(PHY_PLL_LOCK_STATUS), in samsung_ufs_phy_wait_for_lock_acq()66 ufs_phy->reg_pma + in samsung_ufs_phy_wait_for_lock_acq()265 phy->reg_pma = devm_platform_ioremap_resource_byname(pdev, "phy-pma"); in samsung_ufs_phy_probe()266 if (IS_ERR(phy->reg_pma)) { in samsung_ufs_phy_probe()267 err = PTR_ERR(phy->reg_pma); in samsung_ufs_phy_probe()
132 err = readl_poll_timeout(ufs_phy->reg_pma + off, in gs101_phy_wait_for_calibration()154 val = readl(ufs_phy->reg_pma + in gs101_phy_wait_for_cdr_lock()162 writel(LN0_OVRD_RX_CDR_EN, ufs_phy->reg_pma + in gs101_phy_wait_for_cdr_lock()165 ufs_phy->reg_pma + PHY_PMA_TRSV_ADDR(TRSV_REG222, lane)); in gs101_phy_wait_for_cdr_lock()
405 void __iomem *reg_pma; member578 reg_base = phy_drd->reg_pma; in exynos5_usbdrd_apply_phy_tunes()657 void __iomem *regs_base = phy_drd->reg_pma; in exynos5_usbdrd_usbdp_g2_v4_pma_lane_mux_sel()709 phy_drd->reg_pma + EXYNOS9_PMA_USBDP_CMN_REG01C0, in exynos5_usbdrd_usbdp_g2_v4_pma_check_pll_lock()733 (phy_drd->reg_pma in exynos5_usbdrd_usbdp_g2_v4_pma_check_cdr_lock()1271 void __iomem *regs_pma = phy_drd->reg_pma; in exynos5_usbdrd_gs101_pipe3_init()1836 phy_drd->reg_pma = reg; in exynos5_usbdrd_phy_probe()
127 reg = readl(ufs_phy->reg_pma + EXYNOSAUTOV920_CDR_LOCK_OFFSET + in exynosautov920_ufs_phy_wait_cdr_lock()
122 void __iomem *reg_pma; member