Home
last modified time | relevance | path

Searched refs:reg_offs (Results 1 – 25 of 26) sorted by relevance

12

/linux-6.15/drivers/irqchip/
H A Dirq-sunxi-nmi.c56 } reg_offs; member
61 .reg_offs.ctrl = SUN6I_NMI_CTRL,
62 .reg_offs.pend = SUN6I_NMI_PENDING,
63 .reg_offs.enable = SUN6I_NMI_ENABLE,
67 .reg_offs.ctrl = SUN7I_NMI_CTRL,
68 .reg_offs.pend = SUN7I_NMI_PENDING,
69 .reg_offs.enable = SUN7I_NMI_ENABLE,
73 .reg_offs.ctrl = SUN9I_NMI_CTRL,
74 .reg_offs.pend = SUN9I_NMI_PENDING,
75 .reg_offs.enable = SUN9I_NMI_ENABLE,
[all …]
H A Dirq-imgpdc.c89 static void pdc_write(struct pdc_intc_priv *priv, unsigned int reg_offs, in pdc_write() argument
92 iowrite32(data, priv->pdc_base + reg_offs); in pdc_write()
96 unsigned int reg_offs) in pdc_read() argument
98 return ioread32(priv->pdc_base + reg_offs); in pdc_read()
/linux-6.15/drivers/net/ethernet/ti/icssg/
H A Dicss_iep.c108 iep->plat_data->reg_offs[ICSS_IEP_COUNT_REG1]); in icss_iep_set_counter()
530 const u32 *reg_offs = iep->plat_data->reg_offs; in icss_iep_cap_cmp_work() local
537 ns = readl(iep->base + reg_offs[ICSS_IEP_CMP1_REG0]); in icss_iep_cap_cmp_work()
539 val = readl(iep->base + reg_offs[ICSS_IEP_CMP1_REG1]); in icss_iep_cap_cmp_work()
545 iep->base + reg_offs[ICSS_IEP_CMP1_REG0]); in icss_iep_cap_cmp_work()
548 iep->base + reg_offs[ICSS_IEP_CMP1_REG1]); in icss_iep_cap_cmp_work()
562 const u32 *reg_offs = iep->plat_data->reg_offs; in icss_iep_cap_cmp_irq() local
565 val = readl(iep->base + reg_offs[ICSS_IEP_CMP_STAT_REG]); in icss_iep_cap_cmp_irq()
907 writel(val, iep->base + iep->plat_data->reg_offs[reg]); in icss_iep_regmap_write()
917 *val = readl(iep->base + iep->plat_data->reg_offs[reg]); in icss_iep_regmap_read()
[all …]
H A Dicss_iep.h58 u32 reg_offs[ICSS_IEP_MAX_REGS]; member
/linux-6.15/drivers/media/rc/img-ir/
H A Dimg-ir.h158 unsigned int reg_offs, unsigned int data) in img_ir_write() argument
160 iowrite32(data, priv->reg_base + reg_offs); in img_ir_write()
164 unsigned int reg_offs) in img_ir_read() argument
166 return ioread32(priv->reg_base + reg_offs); in img_ir_read()
/linux-6.15/drivers/thermal/broadcom/
H A Dbrcmstb_thermal.c73 u32 reg_offs; member
83 .reg_offs = AVS_TMON_INT_THRESH,
91 .reg_offs = AVS_TMON_INT_THRESH,
99 .reg_offs = AVS_TMON_RESET_THRESH,
195 u32 val = __raw_readl(priv->tmon_base + trip->reg_offs); in avs_tmon_get_trip_temp()
219 orig = __raw_readl(priv->tmon_base + trip->reg_offs); in avs_tmon_set_trip_temp()
222 __raw_writel(orig, priv->tmon_base + trip->reg_offs); in avs_tmon_set_trip_temp()
/linux-6.15/drivers/mtd/nand/raw/
H A Dfsl_upm.c82 u32 mar, reg_offs = fun->mchip_offsets[fun->mchip_number]; in func_exec_instr() local
91 reg_offs; in func_exec_instr()
92 fsl_upm_run_pattern(&fun->upm, fun->io_base + reg_offs, mar); in func_exec_instr()
100 reg_offs; in func_exec_instr()
101 fsl_upm_run_pattern(&fun->upm, fun->io_base + reg_offs, mar); in func_exec_instr()
109 in[i] = in_8(fun->io_base + reg_offs); in func_exec_instr()
115 out_8(fun->io_base + reg_offs, out[i]); in func_exec_instr()
/linux-6.15/drivers/media/dvb-frontends/
H A Ddib7000m.c40 u8 reg_offs; member
353 dib7000m_write_word(state, 263 + state->reg_offs, 6); in dib7000m_set_diversity_in()
354 dib7000m_write_word(state, 264 + state->reg_offs, 6); in dib7000m_set_diversity_in()
357 dib7000m_write_word(state, 263 + state->reg_offs, 1); in dib7000m_set_diversity_in()
358 dib7000m_write_word(state, 264 + state->reg_offs, 0); in dib7000m_set_diversity_in()
359 dib7000m_write_word(state, 266 + state->reg_offs, 0); in dib7000m_set_diversity_in()
605 dib7000m_write_word(state, 261 + state->reg_offs, 2); in dib7000m_demod_reset()
607 dib7000m_write_word(state, 224 + state->reg_offs, 1); in dib7000m_demod_reset()
896 dib7000m_write_word(state, 267 + state->reg_offs, value); in dib7000m_set_channel()
1338 return dib7000m_write_word(state, 294 + state->reg_offs, val); in dib7000m_pid_filter_ctrl()
[all …]
/linux-6.15/drivers/misc/genwqe/
H A Dcard_dev.c1061 u32 reg_offs; in genwqe_ioctl() local
1080 if (get_user(reg_offs, &io->num)) in genwqe_ioctl()
1083 if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x7)) in genwqe_ioctl()
1086 val = __genwqe_readq(cd, reg_offs); in genwqe_ioctl()
1100 if (get_user(reg_offs, &io->num)) in genwqe_ioctl()
1103 if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x7)) in genwqe_ioctl()
1109 __genwqe_writeq(cd, reg_offs, val); in genwqe_ioctl()
1116 if (get_user(reg_offs, &io->num)) in genwqe_ioctl()
1119 if ((reg_offs >= cd->mmio_len) || (reg_offs & 0x3)) in genwqe_ioctl()
1136 if (get_user(reg_offs, &io->num)) in genwqe_ioctl()
[all …]
/linux-6.15/drivers/spi/
H A Dspi-mtk-snfi.c463 u32 reg_offs = 0; in mtk_snand_mac_io() local
479 for (i = 0; i < op->cmd.nbytes; i++, reg_offs++) { in mtk_snand_mac_io()
481 val |= b << (8 * (reg_offs % 4)); in mtk_snand_mac_io()
482 if (reg_offs % 4 == 3) { in mtk_snand_mac_io()
490 val |= b << (8 * (reg_offs % 4)); in mtk_snand_mac_io()
491 if (reg_offs % 4 == 3) { in mtk_snand_mac_io()
498 if (reg_offs % 4 == 3) { in mtk_snand_mac_io()
506 val |= tx_buf[i] << (8 * (reg_offs % 4)); in mtk_snand_mac_io()
507 if (reg_offs % 4 == 3) { in mtk_snand_mac_io()
514 if (reg_offs % 4) in mtk_snand_mac_io()
[all …]
H A Dspi-sh-msiof.c194 static u32 sh_msiof_read(struct sh_msiof_spi_priv *p, int reg_offs) in sh_msiof_read() argument
196 switch (reg_offs) { in sh_msiof_read()
199 return ioread16(p->mapbase + reg_offs); in sh_msiof_read()
201 return ioread32(p->mapbase + reg_offs); in sh_msiof_read()
205 static void sh_msiof_write(struct sh_msiof_spi_priv *p, int reg_offs, in sh_msiof_write() argument
208 switch (reg_offs) { in sh_msiof_write()
211 iowrite16(value, p->mapbase + reg_offs); in sh_msiof_write()
214 iowrite32(value, p->mapbase + reg_offs); in sh_msiof_write()
H A Dspi-rzv2m-csi.c115 int reg_offs, int bit_mask, u32 value) in rzv2m_csi_reg_write_bit() argument
123 tmp = (readl(csi->base + reg_offs) & ~bit_mask) | value; in rzv2m_csi_reg_write_bit()
124 writel(tmp, csi->base + reg_offs); in rzv2m_csi_reg_write_bit()
/linux-6.15/drivers/pmdomain/imx/
H A Dgpc.c49 unsigned int reg_offs; member
67 regmap_read(pd->regmap, pd->reg_offs + GPC_PGC_PDNSCR_OFFS, &val); in imx6_pm_domain_power_off()
72 regmap_update_bits(pd->regmap, pd->reg_offs + GPC_PGC_CTRL_OFFS, in imx6_pm_domain_power_off()
108 regmap_update_bits(pd->regmap, pd->reg_offs + GPC_PGC_CTRL_OFFS, in imx6_pm_domain_power_on()
266 .reg_offs = 0x260,
275 .reg_offs = 0x240,
284 .reg_offs = 0x200,
/linux-6.15/drivers/clk/samsung/
H A Dclk-exynos-arm64.c76 const unsigned long *reg_offs = cmu->clk_regs; in exynos_arm64_init_clocks() local
86 void __iomem *reg = reg_base + reg_offs[i]; in exynos_arm64_init_clocks()
89 if (cmu->manual_plls && is_pll_con1_reg(reg_offs[i])) { in exynos_arm64_init_clocks()
91 } else if (is_gate_reg(reg_offs[i])) { in exynos_arm64_init_clocks()
/linux-6.15/drivers/pmdomain/renesas/
H A Drcar-gen4-sysc.c69 unsigned int reg_offs; in rcar_gen4_sysc_pwr_on_off() local
74 reg_offs = PDRONCR(pdr); in rcar_gen4_sysc_pwr_on_off()
76 reg_offs = PDROFFCR(pdr); in rcar_gen4_sysc_pwr_on_off()
86 iowrite32(PWRON_PWROFF, rcar_gen4_sysc_base + reg_offs); in rcar_gen4_sysc_pwr_on_off()
H A Drcar-sysc.c74 unsigned int sr_bit, reg_offs; in rcar_sysc_pwr_on_off() local
80 reg_offs = PWRONCR_OFFS; in rcar_sysc_pwr_on_off()
83 reg_offs = PWROFFCR_OFFS; in rcar_sysc_pwr_on_off()
98 iowrite32(BIT(pd->chan_bit), rcar_sysc_base + pd->chan_offs + reg_offs); in rcar_sysc_pwr_on_off()
/linux-6.15/arch/microblaze/kernel/
H A Dptrace.c46 static microblaze_reg_t *reg_save_addr(unsigned reg_offs, in reg_save_addr() argument
74 return (microblaze_reg_t *)((char *)regs + reg_offs); in reg_save_addr()
/linux-6.15/drivers/video/fbdev/
H A Dsh_mobile_lcdcfb.h61 unsigned long *reg_offs; member
H A Dsh_mobile_lcdcfb.c290 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr]); in lcdc_write_chan()
299 iowrite32(data, chan->lcdc->base + chan->reg_offs[reg_nr] + in lcdc_write_chan_mirror()
306 return ioread32(chan->lcdc->base + chan->reg_offs[reg_nr]); in lcdc_read_chan()
317 unsigned long reg_offs, unsigned long data) in lcdc_write() argument
319 iowrite32(data, priv->base + reg_offs); in lcdc_write()
323 unsigned long reg_offs) in lcdc_read() argument
325 return ioread32(priv->base + reg_offs); in lcdc_read()
329 unsigned long reg_offs, in lcdc_wait_bit() argument
332 while ((lcdc_read(priv, reg_offs) & mask) != until) in lcdc_wait_bit()
2553 ch->reg_offs = lcdc_offs_mainlcd; in sh_mobile_lcdc_probe()
[all …]
/linux-6.15/arch/arm/mach-omap2/
H A Domap_hwmod.h636 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs);
637 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs);
H A Domap_hwmod.c2889 u32 omap_hwmod_read(struct omap_hwmod *oh, u16 reg_offs) in omap_hwmod_read() argument
2892 return readw_relaxed(oh->_mpu_rt_va + reg_offs); in omap_hwmod_read()
2894 return readl_relaxed(oh->_mpu_rt_va + reg_offs); in omap_hwmod_read()
2897 void omap_hwmod_write(u32 v, struct omap_hwmod *oh, u16 reg_offs) in omap_hwmod_write() argument
2900 writew_relaxed(v, oh->_mpu_rt_va + reg_offs); in omap_hwmod_write()
2902 writel_relaxed(v, oh->_mpu_rt_va + reg_offs); in omap_hwmod_write()
/linux-6.15/drivers/pinctrl/nuvoton/
H A Dpinctrl-ma35.c381 u32 reg_offs, bit_offs, regval; in ma35_gpio_core_to_request() local
385 reg_offs = bank->bank_num * MA35_MFP_REG_SZ_PER_BANK; in ma35_gpio_core_to_request()
389 reg_offs = bank->bank_num * MA35_MFP_REG_SZ_PER_BANK + 4; in ma35_gpio_core_to_request()
393 regmap_read(bank->regmap, MA35_MFP_REG_BASE + reg_offs, &regval); in ma35_gpio_core_to_request()
395 regmap_write(bank->regmap, MA35_MFP_REG_BASE + reg_offs, regval); in ma35_gpio_core_to_request()
/linux-6.15/drivers/media/platform/renesas/
H A Drenesas-ceu.c300 static void ceu_write(struct ceu_device *priv, unsigned int reg_offs, u32 data) in ceu_write() argument
302 iowrite32(data, priv->base + reg_offs); in ceu_write()
305 static u32 ceu_read(struct ceu_device *priv, unsigned int reg_offs) in ceu_read() argument
307 return ioread32(priv->base + reg_offs); in ceu_read()
/linux-6.15/drivers/mtd/nand/raw/brcmnand/
H A Dbrcmnand.c1474 u16 offset0, offset10, reg_offs; in oob_reg_read() local
1483 reg_offs = offset10 + ((offs - 0x10) & ~0x03); in oob_reg_read()
1485 reg_offs = offset0 + (offs & ~0x03); in oob_reg_read()
1487 return nand_readreg(ctrl, reg_offs) >> (24 - ((offs & 0x03) << 3)); in oob_reg_read()
1493 u16 offset0, offset10, reg_offs; in oob_reg_write() local
1502 reg_offs = offset10 + ((offs - 0x10) & ~0x03); in oob_reg_write()
1504 reg_offs = offset0 + (offs & ~0x03); in oob_reg_write()
1506 nand_writereg(ctrl, reg_offs, data); in oob_reg_write()
/linux-6.15/drivers/pinctrl/meson/
H A Dpinctrl-amlogic-a4.c55 u32 reg_offs[AML_NUM_REG]; member
868 bank->pc.reg_offset[i] = aml_rb->reg_offs[i]; in init_bank_register_bit()

12