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Searched refs:reg_block (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dppatomctrl.c48 ATOM_INIT_REG_BLOCK *reg_block, in atomctrl_retrieve_ac_timing() argument
54 ((uint8_t *)reg_block + (2 * sizeof(uint16_t)) + le16_to_cpu(reg_block->usRegIndexTblSize)); in atomctrl_retrieve_ac_timing()
102 ATOM_INIT_REG_BLOCK *reg_block, in atomctrl_set_mc_reg_address_table() argument
138 ATOM_INIT_REG_BLOCK *reg_block; in atomctrl_initialize_mc_reg_table() local
156 reg_block = (ATOM_INIT_REG_BLOCK *) in atomctrl_initialize_mc_reg_table()
158 result = atomctrl_set_mc_reg_address_table(reg_block, table); in atomctrl_initialize_mc_reg_table()
163 reg_block, table); in atomctrl_initialize_mc_reg_table()
175 ATOM_INIT_REG_BLOCK *reg_block; in atomctrl_initialize_mc_reg_table_v2_2() local
193 reg_block = (ATOM_INIT_REG_BLOCK *) in atomctrl_initialize_mc_reg_table_v2_2()
195 result = atomctrl_set_mc_reg_address_table(reg_block, table); in atomctrl_initialize_mc_reg_table_v2_2()
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/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Ddce_v8_0.c2926 u32 reg_block, lb_interrupt_mask; in dce_v8_0_set_crtc_vblank_interrupt_state() local
2935 reg_block = CRTC0_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()
2938 reg_block = CRTC1_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()
2941 reg_block = CRTC2_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()
2944 reg_block = CRTC3_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()
2947 reg_block = CRTC4_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()
2950 reg_block = CRTC5_REGISTER_OFFSET; in dce_v8_0_set_crtc_vblank_interrupt_state()
2977 u32 reg_block, lb_interrupt_mask; in dce_v8_0_set_crtc_vline_interrupt_state() local
2986 reg_block = CRTC0_REGISTER_OFFSET; in dce_v8_0_set_crtc_vline_interrupt_state()
2989 reg_block = CRTC1_REGISTER_OFFSET; in dce_v8_0_set_crtc_vline_interrupt_state()
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H A Datom.c195 idx += gctx->reg_block; in atom_get_src_int()
265 val = gctx->reg_block; in atom_get_src_int()
472 idx += gctx->reg_block; in atom_put_dst()
538 gctx->reg_block = val; in atom_put_dst()
932 ctx->ctx->reg_block = U16(*ptr); in atom_op_setregblock()
934 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block); in atom_op_setregblock()
1295 ctx->reg_block = 0; in amdgpu_atom_execute_table()
H A Datom.h142 uint16_t reg_block; member
H A Ddce_v6_0.c2955 u32 reg_block, interrupt_mask; in dce_v6_0_set_crtc_vblank_interrupt_state() local
2964 reg_block = CRTC0_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state()
2967 reg_block = CRTC1_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state()
2970 reg_block = CRTC2_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state()
2973 reg_block = CRTC3_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state()
2976 reg_block = CRTC4_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state()
2979 reg_block = CRTC5_REGISTER_OFFSET; in dce_v6_0_set_crtc_vblank_interrupt_state()
2988 interrupt_mask = RREG32(mmINT_MASK + reg_block); in dce_v6_0_set_crtc_vblank_interrupt_state()
2990 WREG32(mmINT_MASK + reg_block, interrupt_mask); in dce_v6_0_set_crtc_vblank_interrupt_state()
2993 interrupt_mask = RREG32(mmINT_MASK + reg_block); in dce_v6_0_set_crtc_vblank_interrupt_state()
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H A Damdgpu_atombios.c1476 ATOM_INIT_REG_BLOCK *reg_block = in amdgpu_atombios_init_mc_reg_table() local
1481 ((u8 *)reg_block + (2 * sizeof(u16)) + in amdgpu_atombios_init_mc_reg_table()
1482 le16_to_cpu(reg_block->usRegIndexTblSize)); in amdgpu_atombios_init_mc_reg_table()
1483 ATOM_INIT_REG_INDEX_FORMAT *format = &reg_block->asRegIndexBuf[0]; in amdgpu_atombios_init_mc_reg_table()
1484 num_entries = (u8)((le16_to_cpu(reg_block->usRegIndexTblSize)) / in amdgpu_atombios_init_mc_reg_table()
1523 ((u8 *)reg_data + le16_to_cpu(reg_block->usRegDataBlkSize)); in amdgpu_atombios_init_mc_reg_table()
/linux-6.15/drivers/gpu/drm/radeon/
H A Datom.c193 idx += gctx->reg_block; in atom_get_src_int()
263 val = gctx->reg_block; in atom_get_src_int()
471 idx += gctx->reg_block; in atom_put_dst()
537 gctx->reg_block = val; in atom_put_dst()
895 ctx->ctx->reg_block = U16(*ptr); in atom_op_setregblock()
897 SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block); in atom_op_setregblock()
1242 ctx->reg_block = 0; in atom_execute_table_scratch_unlocked()
H A Datom.h137 uint16_t reg_block; member
H A Dradeon_atombios.c4007 ATOM_INIT_REG_BLOCK *reg_block = in radeon_atom_init_mc_reg_table() local
4012 ((u8 *)reg_block + (2 * sizeof(u16)) + in radeon_atom_init_mc_reg_table()
4013 le16_to_cpu(reg_block->usRegIndexTblSize)); in radeon_atom_init_mc_reg_table()
4014 ATOM_INIT_REG_INDEX_FORMAT *format = &reg_block->asRegIndexBuf[0]; in radeon_atom_init_mc_reg_table()
4015 num_entries = (u8)((le16_to_cpu(reg_block->usRegIndexTblSize)) / in radeon_atom_init_mc_reg_table()
4052 ((u8 *)reg_data + le16_to_cpu(reg_block->usRegDataBlkSize)); in radeon_atom_init_mc_reg_table()
/linux-6.15/drivers/net/ethernet/intel/i40e/
H A Di40e_common.c545 u32 reg_block = 0; in i40e_pre_tx_queue_cfg() local
549 reg_block = abs_queue_idx / 128; in i40e_pre_tx_queue_cfg()
553 reg_val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block)); in i40e_pre_tx_queue_cfg()
562 wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), reg_val); in i40e_pre_tx_queue_cfg()
868 u32 reg_block = 0; in i40e_clear_hw() local
871 reg_block = abs_queue_idx / 128; in i40e_clear_hw()
875 val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block)); in i40e_clear_hw()
880 wr32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block), val); in i40e_clear_hw()