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Searched refs:regUVD_RB_BASE_LO4 (Results 1 – 9 of 9) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/vcn/
H A Dvcn_2_6_0_offset.h1342 #define regUVD_RB_BASE_LO4 … macro
H A Dvcn_5_0_0_offset.h202 #define regUVD_RB_BASE_LO4 … macro
H A Dvcn_4_0_5_offset.h211 #define regUVD_RB_BASE_LO4 … macro
H A Dvcn_4_0_0_offset.h224 #define regUVD_RB_BASE_LO4 … macro
H A Dvcn_4_0_3_offset.h224 #define regUVD_RB_BASE_LO4 … macro
/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dvcn_v5_0_0.c55 SOC15_REG_ENTRY_STR(VCN, 0, regUVD_RB_BASE_LO4),
H A Dvcn_v4_0_5.c71 SOC15_REG_ENTRY_STR(VCN, 0, regUVD_RB_BASE_LO4),
H A Dvcn_v4_0_3.c65 SOC15_REG_ENTRY_STR(VCN, 0, regUVD_RB_BASE_LO4),
H A Dvcn_v4_0.c71 SOC15_REG_ENTRY_STR(VCN, 0, regUVD_RB_BASE_LO4),