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Searched refs:regSMU_INTERRUPT_CONTROL (Results 1 – 9 of 9) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h622 #define regSMU_INTERRUPT_CONTROL … macro
H A Ddcn_3_5_0_offset.h1668 #define regSMU_INTERRUPT_CONTROL … macro
H A Ddcn_3_5_1_offset.h1647 #define regSMU_INTERRUPT_CONTROL … macro
H A Ddcn_3_2_1_offset.h406 #define regSMU_INTERRUPT_CONTROL … macro
H A Ddcn_3_1_4_offset.h1792 #define regSMU_INTERRUPT_CONTROL … macro
H A Ddcn_3_1_2_offset.h823 #define regSMU_INTERRUPT_CONTROL … macro
H A Ddcn_3_2_0_offset.h406 #define regSMU_INTERRUPT_CONTROL … macro
H A Ddcn_4_1_0_offset.h429 #define regSMU_INTERRUPT_CONTROL … macro
H A Ddcn_3_1_6_offset.h1027 #define regSMU_INTERRUPT_CONTROL … macro