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Searched refs:regSDMA0_F32_CNTL (Results 1 – 5 of 5) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dsdma_v6_0.c466 f32_cntl = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_F32_CNTL)); in sdma_v6_0_enable()
468 WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_F32_CNTL), f32_cntl); in sdma_v6_0_enable()
599 temp = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_F32_CNTL)); in sdma_v6_0_gfx_resume_instance()
602 WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_F32_CNTL), temp); in sdma_v6_0_gfx_resume_instance()
771 tmp = RREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_F32_CNTL)); in sdma_v6_0_soft_reset()
774 WREG32_SOC15_IP(GC, sdma_v6_0_get_reg_offset(adev, i, regSDMA0_F32_CNTL), tmp); in sdma_v6_0_soft_reset()
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/sdma/
H A Dsdma_4_4_0_offset.h69 #define regSDMA0_F32_CNTL … macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_offset.h905 #define regSDMA0_F32_CNTL … macro
H A Dgc_11_0_0_offset.h1744 #define regSDMA0_F32_CNTL … macro
H A Dgc_11_0_3_offset.h1782 #define regSDMA0_F32_CNTL … macro