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Searched refs:regRLC_SAFE_MODE (Results 1 – 9 of 9) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v9_4_3.c104 SOC15_REG_ENTRY_STR(GC, 0, regRLC_SAFE_MODE),
1368 WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_SAFE_MODE, data); in gfx_v9_4_3_xcc_set_safe_mode()
1372 if (!REG_GET_FIELD(RREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_SAFE_MODE), RLC_SAFE_MODE, CMD)) in gfx_v9_4_3_xcc_set_safe_mode()
1384 WREG32_SOC15(GC, GET_INST(GC, xcc_id), regRLC_SAFE_MODE, data); in gfx_v9_4_3_xcc_unset_safe_mode()
H A Dgfx_v12_0.c3757 WREG32_SOC15(GC, 0, regRLC_SAFE_MODE, data); in gfx_v12_0_set_safe_mode()
3761 if (!REG_GET_FIELD(RREG32_SOC15(GC, 0, regRLC_SAFE_MODE), in gfx_v12_0_set_safe_mode()
3771 WREG32_SOC15(GC, 0, regRLC_SAFE_MODE, RLC_SAFE_MODE__CMD_MASK); in gfx_v12_0_unset_safe_mode()
H A Dgfx_v11_0.c5117 WREG32_SOC15(GC, 0, regRLC_SAFE_MODE, data); in gfx_v11_0_set_safe_mode()
5121 if (!REG_GET_FIELD(RREG32_SOC15(GC, 0, regRLC_SAFE_MODE), in gfx_v11_0_set_safe_mode()
5130 WREG32_SOC15(GC, 0, regRLC_SAFE_MODE, RLC_SAFE_MODE__CMD_MASK); in gfx_v11_0_unset_safe_mode()
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_9_4_2_offset.h4892 #define regRLC_SAFE_MODE … macro
H A Dgc_9_4_3_offset.h6398 #define regRLC_SAFE_MODE … macro
H A Dgc_11_5_0_offset.h9005 #define regRLC_SAFE_MODE … macro
H A Dgc_12_0_0_offset.h7015 #define regRLC_SAFE_MODE … macro
H A Dgc_11_0_0_offset.h10574 #define regRLC_SAFE_MODE … macro
H A Dgc_11_0_3_offset.h11194 #define regRLC_SAFE_MODE … macro