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Searched refs:regRLC_LX6_IRAM_ADDR (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dgfx_v12_0.c1931 WREG32_SOC15(GC, 0, regRLC_LX6_IRAM_ADDR, 0); in gfx_v12_0_load_rlc_iram_dram_microcode()
1940 WREG32_SOC15(GC, 0, regRLC_LX6_IRAM_ADDR, adev->gfx.rlc_fw_version); in gfx_v12_0_load_rlc_iram_dram_microcode()
1954 WREG32_SOC15(GC, 0, regRLC_LX6_IRAM_ADDR, adev->gfx.rlc_fw_version); in gfx_v12_0_load_rlc_iram_dram_microcode()
H A Dgfx_v11_0.c2259 WREG32_SOC15(GC, 0, regRLC_LX6_IRAM_ADDR, 0); in gfx_v11_0_load_rlc_iram_dram_microcode()
2268 WREG32_SOC15(GC, 0, regRLC_LX6_IRAM_ADDR, adev->gfx.rlc_fw_version); in gfx_v11_0_load_rlc_iram_dram_microcode()
2282 WREG32_SOC15(GC, 0, regRLC_LX6_IRAM_ADDR, adev->gfx.rlc_fw_version); in gfx_v11_0_load_rlc_iram_dram_microcode()
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_offset.h9263 #define regRLC_LX6_IRAM_ADDR … macro
H A Dgc_12_0_0_offset.h6114 #define regRLC_LX6_IRAM_ADDR … macro
H A Dgc_11_0_0_offset.h10834 #define regRLC_LX6_IRAM_ADDR … macro
H A Dgc_11_0_3_offset.h10136 #define regRLC_LX6_IRAM_ADDR … macro