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Searched refs:regRCC_DWNP_DEV0_2_PCIE_RX_CNTL (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_11_0_offset.h8601 #define regRCC_DWNP_DEV0_2_PCIE_RX_CNTL … macro
H A Dnbio_7_9_0_offset.h6268 #define regRCC_DWNP_DEV0_2_PCIE_RX_CNTL … macro
H A Dnbio_4_3_0_offset.h13902 #define regRCC_DWNP_DEV0_2_PCIE_RX_CNTL … macro
H A Dnbio_7_7_0_offset.h6258 #define regRCC_DWNP_DEV0_2_PCIE_RX_CNTL … macro
H A Dnbio_7_2_0_offset.h7036 #define regRCC_DWNP_DEV0_2_PCIE_RX_CNTL … macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_3_1_offset.h7599 #define regRCC_DWNP_DEV0_2_PCIE_RX_CNTL … macro