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Searched refs:regRCC_DWNP_DEV0_1_PCIE_RX_CNTL (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/nbio/
H A Dnbio_7_11_0_offset.h8112 #define regRCC_DWNP_DEV0_1_PCIE_RX_CNTL … macro
H A Dnbio_7_9_0_offset.h3162 #define regRCC_DWNP_DEV0_1_PCIE_RX_CNTL … macro
H A Dnbio_4_3_0_offset.h11034 #define regRCC_DWNP_DEV0_1_PCIE_RX_CNTL … macro
H A Dnbio_7_7_0_offset.h5444 #define regRCC_DWNP_DEV0_1_PCIE_RX_CNTL … macro
H A Dnbio_7_2_0_offset.h6240 #define regRCC_DWNP_DEV0_1_PCIE_RX_CNTL … macro
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/nbif/
H A Dnbif_6_3_1_offset.h4633 #define regRCC_DWNP_DEV0_1_PCIE_RX_CNTL … macro