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Searched refs:regPHYPLLB_PIXCLK_RESYNC_CNTL (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h174 #define regPHYPLLB_PIXCLK_RESYNC_CNTL … macro
H A Ddcn_3_5_0_offset.h1184 #define regPHYPLLB_PIXCLK_RESYNC_CNTL … macro
H A Ddcn_3_5_1_offset.h1163 #define regPHYPLLB_PIXCLK_RESYNC_CNTL … macro
H A Ddcn_3_2_1_offset.h36 #define regPHYPLLB_PIXCLK_RESYNC_CNTL … macro
H A Ddcn_3_1_4_offset.h1331 #define regPHYPLLB_PIXCLK_RESYNC_CNTL … macro
H A Ddcn_3_1_2_offset.h249 #define regPHYPLLB_PIXCLK_RESYNC_CNTL … macro
H A Ddcn_3_2_0_offset.h36 #define regPHYPLLB_PIXCLK_RESYNC_CNTL … macro
H A Ddcn_3_1_5_offset.h36 #define regPHYPLLB_PIXCLK_RESYNC_CNTL … macro
H A Ddcn_4_1_0_offset.h20 #define regPHYPLLB_PIXCLK_RESYNC_CNTL … macro
H A Ddcn_3_1_6_offset.h445 #define regPHYPLLB_PIXCLK_RESYNC_CNTL … macro