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Searched refs:regPHYPLLA_PIXCLK_RESYNC_CNTL (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h172 #define regPHYPLLA_PIXCLK_RESYNC_CNTL … macro
H A Ddcn_3_5_0_offset.h1182 #define regPHYPLLA_PIXCLK_RESYNC_CNTL … macro
H A Ddcn_3_5_1_offset.h1161 #define regPHYPLLA_PIXCLK_RESYNC_CNTL … macro
H A Ddcn_3_2_1_offset.h34 #define regPHYPLLA_PIXCLK_RESYNC_CNTL … macro
H A Ddcn_3_1_4_offset.h1329 #define regPHYPLLA_PIXCLK_RESYNC_CNTL … macro
H A Ddcn_3_1_2_offset.h247 #define regPHYPLLA_PIXCLK_RESYNC_CNTL … macro
H A Ddcn_3_2_0_offset.h34 #define regPHYPLLA_PIXCLK_RESYNC_CNTL … macro
H A Ddcn_3_1_5_offset.h34 #define regPHYPLLA_PIXCLK_RESYNC_CNTL … macro
H A Ddcn_4_1_0_offset.h18 #define regPHYPLLA_PIXCLK_RESYNC_CNTL … macro
H A Ddcn_3_1_6_offset.h443 #define regPHYPLLA_PIXCLK_RESYNC_CNTL … macro