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Searched refs:regOTG3_OTG_V_COUNT_STOP_CONTROL2_BASE_IDX (Results 1 – 4 of 4) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h9129 #define regOTG3_OTG_V_COUNT_STOP_CONTROL2_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h7257 #define regOTG3_OTG_V_COUNT_STOP_CONTROL2_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h7236 #define regOTG3_OTG_V_COUNT_STOP_CONTROL2_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h9266 #define regOTG3_OTG_V_COUNT_STOP_CONTROL2_BASE_IDX … macro