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Searched refs:regOTG3_OTG_VERTICAL_INTERRUPT1_CONTROL (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h9212 #define regOTG3_OTG_VERTICAL_INTERRUPT1_CONTROL … macro
H A Ddcn_3_5_0_offset.h7340 #define regOTG3_OTG_VERTICAL_INTERRUPT1_CONTROL … macro
H A Ddcn_3_5_1_offset.h7319 #define regOTG3_OTG_VERTICAL_INTERRUPT1_CONTROL … macro
H A Ddcn_3_2_1_offset.h8642 #define regOTG3_OTG_VERTICAL_INTERRUPT1_CONTROL … macro
H A Ddcn_3_1_4_offset.h8548 #define regOTG3_OTG_VERTICAL_INTERRUPT1_CONTROL … macro
H A Ddcn_3_1_2_offset.h9499 #define regOTG3_OTG_VERTICAL_INTERRUPT1_CONTROL … macro
H A Ddcn_3_2_0_offset.h8643 #define regOTG3_OTG_VERTICAL_INTERRUPT1_CONTROL … macro
H A Ddcn_3_1_5_offset.h9254 #define regOTG3_OTG_VERTICAL_INTERRUPT1_CONTROL … macro
H A Ddcn_4_1_0_offset.h9351 #define regOTG3_OTG_VERTICAL_INTERRUPT1_CONTROL … macro
H A Ddcn_3_1_6_offset.h9723 #define regOTG3_OTG_VERTICAL_INTERRUPT1_CONTROL … macro