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Searched refs:regOTG2_OTG_DRR_CONTROL_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h9087 #define regOTG2_OTG_DRR_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h7215 #define regOTG2_OTG_DRR_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h7194 #define regOTG2_OTG_DRR_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h8525 #define regOTG2_OTG_DRR_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h8431 #define regOTG2_OTG_DRR_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h9382 #define regOTG2_OTG_DRR_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h8526 #define regOTG2_OTG_DRR_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h9139 #define regOTG2_OTG_DRR_CONTROL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h9224 #define regOTG2_OTG_DRR_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h9606 #define regOTG2_OTG_DRR_CONTROL_BASE_IDX … macro