Home
last modified time | relevance | path

Searched refs:regOTG1_OTG_MASTER_UPDATE_MODE (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h8810 #define regOTG1_OTG_MASTER_UPDATE_MODE … macro
H A Ddcn_3_5_0_offset.h6938 #define regOTG1_OTG_MASTER_UPDATE_MODE … macro
H A Ddcn_3_5_1_offset.h6917 #define regOTG1_OTG_MASTER_UPDATE_MODE … macro
H A Ddcn_3_2_1_offset.h8268 #define regOTG1_OTG_MASTER_UPDATE_MODE … macro
H A Ddcn_3_1_4_offset.h8174 #define regOTG1_OTG_MASTER_UPDATE_MODE … macro
H A Ddcn_3_1_2_offset.h9123 #define regOTG1_OTG_MASTER_UPDATE_MODE … macro
H A Ddcn_3_2_0_offset.h8269 #define regOTG1_OTG_MASTER_UPDATE_MODE … macro
H A Ddcn_3_1_5_offset.h8882 #define regOTG1_OTG_MASTER_UPDATE_MODE … macro
H A Ddcn_4_1_0_offset.h8941 #define regOTG1_OTG_MASTER_UPDATE_MODE … macro
H A Ddcn_3_1_6_offset.h9347 #define regOTG1_OTG_MASTER_UPDATE_MODE … macro