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Searched refs:regOTG1_OTG_GSL_CONTROL_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h8825 #define regOTG1_OTG_GSL_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h6953 #define regOTG1_OTG_GSL_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h6932 #define regOTG1_OTG_GSL_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h8283 #define regOTG1_OTG_GSL_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h8189 #define regOTG1_OTG_GSL_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h9138 #define regOTG1_OTG_GSL_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h8284 #define regOTG1_OTG_GSL_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h8897 #define regOTG1_OTG_GSL_CONTROL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h8956 #define regOTG1_OTG_GSL_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h9362 #define regOTG1_OTG_GSL_CONTROL_BASE_IDX … macro