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Searched refs:regOTG0_OTG_GLOBAL_CONTROL3_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h8605 #define regOTG0_OTG_GLOBAL_CONTROL3_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h6733 #define regOTG0_OTG_GLOBAL_CONTROL3_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h6712 #define regOTG0_OTG_GLOBAL_CONTROL3_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h8085 #define regOTG0_OTG_GLOBAL_CONTROL3_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h7991 #define regOTG0_OTG_GLOBAL_CONTROL3_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h8938 #define regOTG0_OTG_GLOBAL_CONTROL3_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h8086 #define regOTG0_OTG_GLOBAL_CONTROL3_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h8699 #define regOTG0_OTG_GLOBAL_CONTROL3_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h8732 #define regOTG0_OTG_GLOBAL_CONTROL3_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h9162 #define regOTG0_OTG_GLOBAL_CONTROL3_BASE_IDX … macro