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Searched refs:regOTG0_OTG_DOUBLE_BUFFER_CONTROL_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h8501 #define regOTG0_OTG_DOUBLE_BUFFER_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h6629 #define regOTG0_OTG_DOUBLE_BUFFER_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h6608 #define regOTG0_OTG_DOUBLE_BUFFER_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h7997 #define regOTG0_OTG_DOUBLE_BUFFER_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h7903 #define regOTG0_OTG_DOUBLE_BUFFER_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h8848 #define regOTG0_OTG_DOUBLE_BUFFER_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h7998 #define regOTG0_OTG_DOUBLE_BUFFER_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h8609 #define regOTG0_OTG_DOUBLE_BUFFER_CONTROL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h8628 #define regOTG0_OTG_DOUBLE_BUFFER_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h9072 #define regOTG0_OTG_DOUBLE_BUFFER_CONTROL_BASE_IDX … macro