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Searched refs:regMPC_OUT2_CSC_C21_C22_A_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h7373 #define regMPC_OUT2_CSC_C21_C22_A_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h13165 #define regMPC_OUT2_CSC_C21_C22_A_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h13144 #define regMPC_OUT2_CSC_C21_C22_A_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h6921 #define regMPC_OUT2_CSC_C21_C22_A_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h14231 #define regMPC_OUT2_CSC_C21_C22_A_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h7492 #define regMPC_OUT2_CSC_C21_C22_A_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h6922 #define regMPC_OUT2_CSC_C21_C22_A_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h7251 #define regMPC_OUT2_CSC_C21_C22_A_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h7701 #define regMPC_OUT2_CSC_C21_C22_A_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h7712 #define regMPC_OUT2_CSC_C21_C22_A_BASE_IDX … macro