Home
last modified time | relevance | path

Searched refs:regMPCC_MCM1_MPCC_MCM_MEM_PWR_CTRL_BASE_IDX (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h6711 #define regMPCC_MCM1_MPCC_MCM_MEM_PWR_CTRL_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h14524 #define regMPCC_MCM1_MPCC_MCM_MEM_PWR_CTRL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h14503 #define regMPCC_MCM1_MPCC_MCM_MEM_PWR_CTRL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h6259 #define regMPCC_MCM1_MPCC_MCM_MEM_PWR_CTRL_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h6260 #define regMPCC_MCM1_MPCC_MCM_MEM_PWR_CTRL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h6915 #define regMPCC_MCM1_MPCC_MCM_MEM_PWR_CTRL_BASE_IDX … macro