Home
last modified time | relevance | path

Searched refs:regMPCC_MCM1_MPCC_MCM_1DLUT_CONTROL (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h6562 #define regMPCC_MCM1_MPCC_MCM_1DLUT_CONTROL … macro
H A Ddcn_3_5_0_offset.h14375 #define regMPCC_MCM1_MPCC_MCM_1DLUT_CONTROL … macro
H A Ddcn_3_5_1_offset.h14354 #define regMPCC_MCM1_MPCC_MCM_1DLUT_CONTROL … macro
H A Ddcn_3_2_1_offset.h6110 #define regMPCC_MCM1_MPCC_MCM_1DLUT_CONTROL … macro
H A Ddcn_3_2_0_offset.h6111 #define regMPCC_MCM1_MPCC_MCM_1DLUT_CONTROL … macro
H A Ddcn_4_1_0_offset.h6710 #define regMPCC_MCM1_MPCC_MCM_1DLUT_CONTROL … macro