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Searched refs:regMPCC3_MPCC_MEM_PWR_CTRL (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h5328 #define regMPCC3_MPCC_MEM_PWR_CTRL … macro
H A Ddcn_3_5_0_offset.h12271 #define regMPCC3_MPCC_MEM_PWR_CTRL … macro
H A Ddcn_3_5_1_offset.h12250 #define regMPCC3_MPCC_MEM_PWR_CTRL … macro
H A Ddcn_3_2_1_offset.h4902 #define regMPCC3_MPCC_MEM_PWR_CTRL … macro
H A Ddcn_3_1_4_offset.h13338 #define regMPCC3_MPCC_MEM_PWR_CTRL … macro
H A Ddcn_3_1_2_offset.h6577 #define regMPCC3_MPCC_MEM_PWR_CTRL … macro
H A Ddcn_3_2_0_offset.h4903 #define regMPCC3_MPCC_MEM_PWR_CTRL … macro
H A Ddcn_3_1_5_offset.h6336 #define regMPCC3_MPCC_MEM_PWR_CTRL … macro
H A Ddcn_4_1_0_offset.h5426 #define regMPCC3_MPCC_MEM_PWR_CTRL … macro
H A Ddcn_3_1_6_offset.h6797 #define regMPCC3_MPCC_MEM_PWR_CTRL … macro