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Searched refs:regMCIF_WB_BUFMGR_VCE_CONTROL (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h1250 #define regMCIF_WB_BUFMGR_VCE_CONTROL … macro
H A Ddcn_3_5_0_offset.h2135 #define regMCIF_WB_BUFMGR_VCE_CONTROL … macro
H A Ddcn_3_5_1_offset.h2114 #define regMCIF_WB_BUFMGR_VCE_CONTROL … macro
H A Ddcn_3_2_1_offset.h1100 #define regMCIF_WB_BUFMGR_VCE_CONTROL … macro
H A Ddcn_3_1_4_offset.h2378 #define regMCIF_WB_BUFMGR_VCE_CONTROL … macro
H A Ddcn_3_1_2_offset.h1463 #define regMCIF_WB_BUFMGR_VCE_CONTROL … macro
H A Ddcn_3_2_0_offset.h1100 #define regMCIF_WB_BUFMGR_VCE_CONTROL … macro
H A Ddcn_3_1_5_offset.h1226 #define regMCIF_WB_BUFMGR_VCE_CONTROL … macro
H A Ddcn_4_1_0_offset.h1111 #define regMCIF_WB_BUFMGR_VCE_CONTROL … macro
H A Ddcn_3_1_6_offset.h1679 #define regMCIF_WB_BUFMGR_VCE_CONTROL … macro