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Searched refs:regGFX_IMU_SCRATCH_10 (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dimu_v12_0.c151 imu_reg_val = RREG32_SOC15(GC, 0, regGFX_IMU_SCRATCH_10); in imu_v12_0_setup()
153 WREG32_SOC15(GC, 0, regGFX_IMU_SCRATCH_10, imu_reg_val); in imu_v12_0_setup()
H A Dimu_v11_0.c159 imu_reg_val = RREG32_SOC15(GC, 0, regGFX_IMU_SCRATCH_10); in imu_v11_0_setup()
161 WREG32_SOC15(GC, 0, regGFX_IMU_SCRATCH_10, imu_reg_val); in imu_v11_0_setup()
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_offset.h9511 #define regGFX_IMU_SCRATCH_10 macro
H A Dgc_12_0_0_offset.h7145 #define regGFX_IMU_SCRATCH_10 macro
H A Dgc_11_0_0_offset.h11126 #define regGFX_IMU_SCRATCH_10 macro
H A Dgc_11_0_3_offset.h11528 #define regGFX_IMU_SCRATCH_10 macro