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Searched refs:regGFX_IMU_RLC_RAM_ADDR_LOW (Results 1 – 7 of 7) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/amdgpu/
H A Dimu_v11_0_3.c131 WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_LOW, reg); in program_rlc_ram_register_setting()
136 WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_LOW, 0); in program_rlc_ram_register_setting()
H A Dimu_v12_0.c275 WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_LOW, reg); in program_imu_rlc_ram_old()
356 WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_LOW, reg | val_l); in program_imu_rlc_ram()
386 WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_LOW, 0); in imu_v12_0_program_rlc_ram()
H A Dimu_v11_0.c343 WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_LOW, reg); in program_imu_rlc_ram()
348 WREG32_SOC15(GC, 0, regGFX_IMU_RLC_RAM_ADDR_LOW, 0); in program_imu_rlc_ram()
/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_offset.h9595 #define regGFX_IMU_RLC_RAM_ADDR_LOW … macro
H A Dgc_12_0_0_offset.h7151 #define regGFX_IMU_RLC_RAM_ADDR_LOW … macro
H A Dgc_11_0_0_offset.h11215 #define regGFX_IMU_RLC_RAM_ADDR_LOW … macro
H A Dgc_11_0_3_offset.h11618 #define regGFX_IMU_RLC_RAM_ADDR_LOW … macro