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Searched refs:regGCVM_IOMMU_PERFORMANCE_OPTIMIZATION_CONTROL_REGISTER_BASE_IDX (Results 1 – 3 of 3) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/gc/
H A Dgc_11_5_0_offset.h2602 #define regGCVM_IOMMU_PERFORMANCE_OPTIMIZATION_CONTROL_REGISTER_BASE_IDX … macro
H A Dgc_12_0_0_offset.h3417 #define regGCVM_IOMMU_PERFORMANCE_OPTIMIZATION_CONTROL_REGISTER_BASE_IDX … macro
H A Dgc_11_0_3_offset.h3613 #define regGCVM_IOMMU_PERFORMANCE_OPTIMIZATION_CONTROL_REGISTER_BASE_IDX … macro