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Searched refs:regDWB_OGAM_RAMA_START_SLOPE_CNTL_G (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h1054 #define regDWB_OGAM_RAMA_START_SLOPE_CNTL_G … macro
H A Ddcn_3_5_0_offset.h11126 #define regDWB_OGAM_RAMA_START_SLOPE_CNTL_G … macro
H A Ddcn_3_5_1_offset.h11105 #define regDWB_OGAM_RAMA_START_SLOPE_CNTL_G … macro
H A Ddcn_3_2_1_offset.h804 #define regDWB_OGAM_RAMA_START_SLOPE_CNTL_G … macro
H A Ddcn_3_1_4_offset.h12230 #define regDWB_OGAM_RAMA_START_SLOPE_CNTL_G … macro
H A Ddcn_3_1_2_offset.h1197 #define regDWB_OGAM_RAMA_START_SLOPE_CNTL_G … macro
H A Ddcn_3_2_0_offset.h804 #define regDWB_OGAM_RAMA_START_SLOPE_CNTL_G … macro
H A Ddcn_3_1_5_offset.h900 #define regDWB_OGAM_RAMA_START_SLOPE_CNTL_G … macro
H A Ddcn_4_1_0_offset.h933 #define regDWB_OGAM_RAMA_START_SLOPE_CNTL_G … macro
H A Ddcn_3_1_6_offset.h1401 #define regDWB_OGAM_RAMA_START_SLOPE_CNTL_G … macro