Home
last modified time | relevance | path

Searched refs:regDWB_OGAM_RAMA_END_CNTL2_G_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h1067 #define regDWB_OGAM_RAMA_END_CNTL2_G_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h11139 #define regDWB_OGAM_RAMA_END_CNTL2_G_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h11118 #define regDWB_OGAM_RAMA_END_CNTL2_G_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h817 #define regDWB_OGAM_RAMA_END_CNTL2_G_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h12243 #define regDWB_OGAM_RAMA_END_CNTL2_G_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h1210 #define regDWB_OGAM_RAMA_END_CNTL2_G_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h817 #define regDWB_OGAM_RAMA_END_CNTL2_G_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h913 #define regDWB_OGAM_RAMA_END_CNTL2_G_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h946 #define regDWB_OGAM_RAMA_END_CNTL2_G_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h1414 #define regDWB_OGAM_RAMA_END_CNTL2_G_BASE_IDX … macro