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Searched refs:regDTBCLK_DTO2_PHASE (Results 1 – 9 of 9) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h356 #define regDTBCLK_DTO2_PHASE … macro
H A Ddcn_3_5_0_offset.h1366 #define regDTBCLK_DTO2_PHASE … macro
H A Ddcn_3_5_1_offset.h1345 #define regDTBCLK_DTO2_PHASE … macro
H A Ddcn_3_2_1_offset.h210 #define regDTBCLK_DTO2_PHASE … macro
H A Ddcn_3_1_4_offset.h1507 #define regDTBCLK_DTO2_PHASE … macro
H A Ddcn_3_1_2_offset.h415 #define regDTBCLK_DTO2_PHASE … macro
H A Ddcn_3_2_0_offset.h210 #define regDTBCLK_DTO2_PHASE … macro
H A Ddcn_3_1_5_offset.h204 #define regDTBCLK_DTO2_PHASE … macro
H A Ddcn_3_1_6_offset.h617 #define regDTBCLK_DTO2_PHASE … macro