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Searched refs:regDSC_TOP3_DSC_TOP_CONTROL (Results 1 – 7 of 7) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h13057 #define regDSC_TOP3_DSC_TOP_CONTROL macro
H A Ddcn_3_5_0_offset.h10878 #define regDSC_TOP3_DSC_TOP_CONTROL macro
H A Ddcn_3_5_1_offset.h10857 #define regDSC_TOP3_DSC_TOP_CONTROL macro
H A Ddcn_3_2_1_offset.h12163 #define regDSC_TOP3_DSC_TOP_CONTROL macro
H A Ddcn_3_1_4_offset.h11980 #define regDSC_TOP3_DSC_TOP_CONTROL macro
H A Ddcn_3_2_0_offset.h12179 #define regDSC_TOP3_DSC_TOP_CONTROL macro
H A Ddcn_4_1_0_offset.h12443 #define regDSC_TOP3_DSC_TOP_CONTROL macro