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Searched refs:regDSCL3_OBUF_MEM_PWR_CTRL (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h4928 #define regDSCL3_OBUF_MEM_PWR_CTRL … macro
H A Ddcn_3_5_0_offset.h5819 #define regDSCL3_OBUF_MEM_PWR_CTRL … macro
H A Ddcn_3_5_1_offset.h5798 #define regDSCL3_OBUF_MEM_PWR_CTRL … macro
H A Ddcn_3_2_1_offset.h4528 #define regDSCL3_OBUF_MEM_PWR_CTRL … macro
H A Ddcn_3_1_4_offset.h6818 #define regDSCL3_OBUF_MEM_PWR_CTRL … macro
H A Ddcn_3_1_2_offset.h5909 #define regDSCL3_OBUF_MEM_PWR_CTRL … macro
H A Ddcn_3_2_0_offset.h4529 #define regDSCL3_OBUF_MEM_PWR_CTRL … macro
H A Ddcn_3_1_5_offset.h5668 #define regDSCL3_OBUF_MEM_PWR_CTRL … macro
H A Ddcn_4_1_0_offset.h4960 #define regDSCL3_OBUF_MEM_PWR_CTRL … macro
H A Ddcn_3_1_6_offset.h6129 #define regDSCL3_OBUF_MEM_PWR_CTRL … macro