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Searched refs:regDSCL2_SCL_COEF_RAM_TAP_DATA (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h4448 #define regDSCL2_SCL_COEF_RAM_TAP_DATA … macro
H A Ddcn_3_5_0_offset.h5343 #define regDSCL2_SCL_COEF_RAM_TAP_DATA … macro
H A Ddcn_3_5_1_offset.h5322 #define regDSCL2_SCL_COEF_RAM_TAP_DATA … macro
H A Ddcn_3_2_1_offset.h4074 #define regDSCL2_SCL_COEF_RAM_TAP_DATA … macro
H A Ddcn_3_1_4_offset.h6062 #define regDSCL2_SCL_COEF_RAM_TAP_DATA … macro
H A Ddcn_3_1_2_offset.h5153 #define regDSCL2_SCL_COEF_RAM_TAP_DATA … macro
H A Ddcn_3_2_0_offset.h4075 #define regDSCL2_SCL_COEF_RAM_TAP_DATA … macro
H A Ddcn_3_1_5_offset.h4912 #define regDSCL2_SCL_COEF_RAM_TAP_DATA … macro
H A Ddcn_4_1_0_offset.h4387 #define regDSCL2_SCL_COEF_RAM_TAP_DATA … macro
H A Ddcn_3_1_6_offset.h5373 #define regDSCL2_SCL_COEF_RAM_TAP_DATA … macro