Home
last modified time | relevance | path

Searched refs:regDSCL2_OBUF_CONTROL_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h4511 #define regDSCL2_OBUF_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h5406 #define regDSCL2_OBUF_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h5385 #define regDSCL2_OBUF_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h4137 #define regDSCL2_OBUF_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h6125 #define regDSCL2_OBUF_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h5216 #define regDSCL2_OBUF_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h4138 #define regDSCL2_OBUF_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h4975 #define regDSCL2_OBUF_CONTROL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h4450 #define regDSCL2_OBUF_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h5436 #define regDSCL2_OBUF_CONTROL_BASE_IDX … macro