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Searched refs:regDSCL2_DSCL_2TAP_CONTROL_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h4457 #define regDSCL2_DSCL_2TAP_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h5352 #define regDSCL2_DSCL_2TAP_CONTROL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h5331 #define regDSCL2_DSCL_2TAP_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h4083 #define regDSCL2_DSCL_2TAP_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h6071 #define regDSCL2_DSCL_2TAP_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h5162 #define regDSCL2_DSCL_2TAP_CONTROL_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h4084 #define regDSCL2_DSCL_2TAP_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h4921 #define regDSCL2_DSCL_2TAP_CONTROL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h4396 #define regDSCL2_DSCL_2TAP_CONTROL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h5382 #define regDSCL2_DSCL_2TAP_CONTROL_BASE_IDX … macro