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Searched refs:regDSCL1_SCL_COEF_RAM_TAP_DATA (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h4032 #define regDSCL1_SCL_COEF_RAM_TAP_DATA … macro
H A Ddcn_3_5_0_offset.h4931 #define regDSCL1_SCL_COEF_RAM_TAP_DATA … macro
H A Ddcn_3_5_1_offset.h4910 #define regDSCL1_SCL_COEF_RAM_TAP_DATA … macro
H A Ddcn_3_2_1_offset.h3684 #define regDSCL1_SCL_COEF_RAM_TAP_DATA … macro
H A Ddcn_3_1_4_offset.h5370 #define regDSCL1_SCL_COEF_RAM_TAP_DATA … macro
H A Ddcn_3_1_2_offset.h4461 #define regDSCL1_SCL_COEF_RAM_TAP_DATA … macro
H A Ddcn_3_2_0_offset.h3685 #define regDSCL1_SCL_COEF_RAM_TAP_DATA … macro
H A Ddcn_3_1_5_offset.h4220 #define regDSCL1_SCL_COEF_RAM_TAP_DATA … macro
H A Ddcn_4_1_0_offset.h3877 #define regDSCL1_SCL_COEF_RAM_TAP_DATA … macro
H A Ddcn_3_1_6_offset.h4681 #define regDSCL1_SCL_COEF_RAM_TAP_DATA … macro