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Searched refs:regDSCL1_LB_MEMORY_CTRL_BASE_IDX (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h4087 #define regDSCL1_LB_MEMORY_CTRL_BASE_IDX … macro
H A Ddcn_3_5_0_offset.h4986 #define regDSCL1_LB_MEMORY_CTRL_BASE_IDX … macro
H A Ddcn_3_5_1_offset.h4965 #define regDSCL1_LB_MEMORY_CTRL_BASE_IDX … macro
H A Ddcn_3_2_1_offset.h3739 #define regDSCL1_LB_MEMORY_CTRL_BASE_IDX … macro
H A Ddcn_3_1_4_offset.h5425 #define regDSCL1_LB_MEMORY_CTRL_BASE_IDX … macro
H A Ddcn_3_1_2_offset.h4516 #define regDSCL1_LB_MEMORY_CTRL_BASE_IDX … macro
H A Ddcn_3_2_0_offset.h3740 #define regDSCL1_LB_MEMORY_CTRL_BASE_IDX … macro
H A Ddcn_3_1_5_offset.h4275 #define regDSCL1_LB_MEMORY_CTRL_BASE_IDX … macro
H A Ddcn_4_1_0_offset.h3932 #define regDSCL1_LB_MEMORY_CTRL_BASE_IDX … macro
H A Ddcn_3_1_6_offset.h4736 #define regDSCL1_LB_MEMORY_CTRL_BASE_IDX … macro