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Searched refs:regDSCL0_OBUF_MEM_PWR_CTRL (Results 1 – 10 of 10) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h3680 #define regDSCL0_OBUF_MEM_PWR_CTRL … macro
H A Ddcn_3_5_0_offset.h4583 #define regDSCL0_OBUF_MEM_PWR_CTRL … macro
H A Ddcn_3_5_1_offset.h4562 #define regDSCL0_OBUF_MEM_PWR_CTRL … macro
H A Ddcn_3_2_1_offset.h3358 #define regDSCL0_OBUF_MEM_PWR_CTRL … macro
H A Ddcn_3_1_4_offset.h4742 #define regDSCL0_OBUF_MEM_PWR_CTRL … macro
H A Ddcn_3_1_2_offset.h3833 #define regDSCL0_OBUF_MEM_PWR_CTRL … macro
H A Ddcn_3_2_0_offset.h3359 #define regDSCL0_OBUF_MEM_PWR_CTRL … macro
H A Ddcn_3_1_5_offset.h3592 #define regDSCL0_OBUF_MEM_PWR_CTRL … macro
H A Ddcn_4_1_0_offset.h3432 #define regDSCL0_OBUF_MEM_PWR_CTRL … macro
H A Ddcn_3_1_6_offset.h4053 #define regDSCL0_OBUF_MEM_PWR_CTRL … macro