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Searched refs:regDSCC3_DSCC_RATE_BUFFER0_MAX_FULLNESS_LEVEL (Results 1 – 6 of 6) sorted by relevance

/linux-6.15/drivers/gpu/drm/amd/include/asic_reg/dcn/
H A Ddcn_3_6_0_offset.h13027 #define regDSCC3_DSCC_RATE_BUFFER0_MAX_FULLNESS_LEVEL … macro
H A Ddcn_3_5_0_offset.h10966 #define regDSCC3_DSCC_RATE_BUFFER0_MAX_FULLNESS_LEVEL … macro
H A Ddcn_3_5_1_offset.h10945 #define regDSCC3_DSCC_RATE_BUFFER0_MAX_FULLNESS_LEVEL … macro
H A Ddcn_3_2_1_offset.h12131 #define regDSCC3_DSCC_RATE_BUFFER0_MAX_FULLNESS_LEVEL … macro
H A Ddcn_3_1_4_offset.h12068 #define regDSCC3_DSCC_RATE_BUFFER0_MAX_FULLNESS_LEVEL … macro
H A Ddcn_3_2_0_offset.h12141 #define regDSCC3_DSCC_RATE_BUFFER0_MAX_FULLNESS_LEVEL … macro